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Open roles at AMD, page 17

  • Principal / Lead Systems Validation Engineer in United States
  • Lead SerDes Technical Marketing Engineer in Hyderabad
  • System Failure Analysis Engineer (GPU Servers / Data Center) in Austin
  • Debug Lead Engineer in Bengaluru
  • Supply Chain Manager – Server Product Planning in Austin
  • Technical Marketing Engineer- Embedded x86 in San Jose
  • SOC Silicon Design Engineer in Austin
  • Sys/Test Validation Engineer in Taipei
  • Sys/Test Validation Engineer in Taipei
  • Senior Software Development Engineer - PYTHON PACKAGING in Munich
  • Server BIOS Engineer in Taipei
  • Senior Robotics Software Usecases Validation Engineer  in Bengaluru
  • Manager - Firmware Software Systems Design in Bengaluru
  • Lead DFT Architect in Bengaluru
  • Technical Marketing Engineer – Datacenter GPU Clusters & Networking in Santa Clara
  • Product Planning Engineer-ASIC/SoC in San Jose
  • Sr. Manager Sys/Test Validation Eng. in Austin
  • Senior DFx Methodology Architect in San Jose
  • Senior Manager, GPU Application Engineering in Santa Clara
  • Sr Software Robotics Development Engineer   in Bengaluru
  • Solutions Architect in San Jose
  • Interconnect Firmware Engineer in Austin
  • Manager, Server CPU Business Planning & Strategy in Austin
  • Virtual Software Modeling Engineer in Austin
  • Business Development Sr. Manager in Austin
  • Business Development Manager in Austin
  • Sr. Manager, NPI Quality Engineering – Server & Rack Solutions in United States
  • Sr. Technical Validation Program Manager in Austin
  • Staff Analog Layout Design Engineer in Penang
  • Senior Linux Kernel Developer – Ethernet Drivers & Virtualization in Bengaluru
  • Sr. PCB Physical Design Engineer in Santa Clara
  • Lead AI/ML Software Use Cases Validation Engineer in Bengaluru
  • Principal Systems Design Engineer in San Jose
  • System Architecture Fellow - AI & Data Center Networking in Santa Clara
  • Lead DFx Silicon Design Engineer in Bengaluru
  • Senior Windows Kernel Developer – Device Drivers & Virtualization in Bengaluru
  • Methodology Engineer – Static RTL Verification in San Jose
  • System Performance Lead in Austin
  • Sr. Strategic Buyer in United States
  • System Architect in Santa Clara, Austin, Seattle
  • Pre-Silicon Technical Program Manager in Hyderabad
  • AI Creative Technologist in Santa Clara
  • Power and Performance Architect in Austin
  • Validation Engineer in Austin
  • Program Manager in Taipei
  • Business Operations Budget Manager in Austin
  • Sr. Product Engineer - Silicon Technology Validation in Austin
  • SITECH TEST ENGINEERING MANAGER in Austin
  • CPU Performance Architect in Markham
  • Director, Product Development Engineering-ASIC/SoC in San Jose

Page 17 of 22, 1,060 open roles

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