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Open roles at AMD, page 24

  • Automation of PDM processes Intern in Singapore
  • IC Design Exploration Intern in Singapore
  • Diagnostic Design Engineering Intern in Singapore
  • Sr. Fellow -- Memory PHY Architect in Santa Clara
  • Packaging Engineer (CPO) in Taiwan
  • Staff Design Verification Engineer in Dublin
  • Principal Performance Architect in Austin
  • HSIO Enablement Lead in Bengaluru
  • Lead- System Engineer in Bengaluru
  • Post Silicon Validation Manager in Bengaluru
  • Director - Pre-silicon Emulation / Post Silicon Validation in Bengaluru
  • Applied Research Scientist - AI Models & Agents in Bengaluru
  • Sr. Lead IP/RTL Design Engineer in Bengaluru
  • Data Accelerator - RTL Design Engineer – Lead in Markham
  • Software Development Engineering Lead- Routing in San Jose
  • Director Software Development, AI Models and Research in San Jose
  • Verification Engineer in San Jose
  • Performance Architect – x86 & Customer Solutions in Austin
  • RTL IP Design Engineer in Hyderabad
  • Senior Staff Software Development Engineer, Routing in San Jose

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