Ciena

6 days ago

Transmitter (Tx) SerDes Design Lead — 224G/448G

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 14 hours agoStatus: Live

Job Summary

Design and deliver high-speed electrical transmitter macros for 224G and 448G SerDes in deep-submicron CMOS. Own schematic-level design and post-layout verification of the transmitter signal chain, evaluate circuit topologies and tradeoffs, and run extraction-based simulations to validate performance across process, voltage, and temperature. Collaborate through full GDSII integration, lead root-cause analysis, and mentor junior design and layout engineers while partnering with lab validation teams.

Location: Ottawa, Ontario

Workplace: Remote

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Own schematic-level design and post-layout verification of the transmitter signal chain and its blocks (DAC-based output stage, serialization, clocking interface, output driver).
•Collaborate with management, system designers, and lab validation teams to evolve transmitter architecture and meet standard and product requirements.
•Evaluate circuit topologies and recommend implementations balancing power, area, bandwidth, and technology constraints.
•Drive extraction-based post-layout simulations and validate transmitter performance (bandwidth, linearity/RLM, return loss, jitter, and power) across process, voltage, and temperature conditions.
•Provide technical guidance and mentorship to more junior design and layout engineers and support test-chip/product bring-up and characterization.

Pay and Benefits

Salary: CAD 138,000 - 220,400 annually

Perks:Health InsuranceDentalVision401kDcppEquityEmployee AssistancePaid LeavePaid Holidays

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Engineering, or applicable scientific discipline.
•10+ years designing high-speed analog, mixed-signal, or SerDes transmitter circuits in advanced CMOS, from schematic design through post-layout verification.
•Experience with transmitter building blocks including DAC-based output stages, serializers or multiplexers, output drivers, and clocking circuits.
•Execution of post-layout and extraction-based simulations to validate performance across process, voltage, and temperature conditions.
•Ability to use Cadence, Mentor, or Synopsys tools including Virtuoso, Calibre, STAR-RC, and MMSIM.

Experience:10+ yearsHigh-speed connectivityOptical transmissionSerDesAnalogMixed-signal

Education:Bachelor's in Electrical Engineering or Computer Engineering

Skills:CommunicationIndependent workTeamworkMentorshipRoot-cause analysis

Tech Stack:MATLABVerilog-AC++CadenceVirtuosoCalibreSynopsysSTAR-RCMMSIMHFSSEMXGDSIIDACPAM4PAM6OIF-CEIIEEE

Company Brief

Ciena

Provides networking systems, software, and services that enable service providers, cloud operators, and enterprises to deliver high-capacity connectivity and adaptive network solutions worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Hanover, United States

Founded: 1992

Glassdoor: 3.8

Website LinkedIn

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Ciena

6 days ago

Transmitter (Tx) SerDes Design Lead — 224G/448G

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 14 hours agoStatus: Live

Job Summary

Location: Ottawa, Ontario

Workplace: Remote

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Own schematic-level design and post-layout verification of the transmitter signal chain and its blocks (DAC-based output stage, serialization, clocking interface, output driver).
•Collaborate with management, system designers, and lab validation teams to evolve transmitter architecture and meet standard and product requirements.
•Evaluate circuit topologies and recommend implementations balancing power, area, bandwidth, and technology constraints.
•Drive extraction-based post-layout simulations and validate transmitter performance (bandwidth, linearity/RLM, return loss, jitter, and power) across process, voltage, and temperature conditions.
•Provide technical guidance and mentorship to more junior design and layout engineers and support test-chip/product bring-up and characterization.

Pay and Benefits

Salary: CAD 138,000 - 220,400 annually

Perks:Health InsuranceDentalVision401kDcppEquityEmployee AssistancePaid LeavePaid Holidays

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Engineering, or applicable scientific discipline.
•10+ years designing high-speed analog, mixed-signal, or SerDes transmitter circuits in advanced CMOS, from schematic design through post-layout verification.
•Experience with transmitter building blocks including DAC-based output stages, serializers or multiplexers, output drivers, and clocking circuits.
•Execution of post-layout and extraction-based simulations to validate performance across process, voltage, and temperature conditions.
•Ability to use Cadence, Mentor, or Synopsys tools including Virtuoso, Calibre, STAR-RC, and MMSIM.

Experience:10+ yearsHigh-speed connectivityOptical transmissionSerDesAnalogMixed-signal

Education:Bachelor's in Electrical Engineering or Computer Engineering

Skills:CommunicationIndependent workTeamworkMentorshipRoot-cause analysis

Tech Stack:MATLABVerilog-AC++CadenceVirtuosoCalibreSynopsysSTAR-RCMMSIMHFSSEMXGDSIIDACPAM4PAM6OIF-CEIIEEE

Company Brief

Ciena

Provides networking systems, software, and services that enable service providers, cloud operators, and enterprises to deliver high-capacity connectivity and adaptive network solutions worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Hanover, United States

Founded: 1992

Glassdoor: 3.8

Website LinkedIn