Cadence Design Systems

1 month ago

Sr Principal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Lead Analog Design Engineer responsible for high-speed CMOS analog/mixed-signal blocks (SERDES) in a Die-to-Die product development context. Collaborates with layout, tech leads, and global teams across time zones to deliver SERDES architectures, PMA sections, and detector circuitry on cutting-edge nodes (3nm FinFET). Requires deep CMOS design expertise and CAD proficiency to meet customer specs and performance targets.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Sr. Manager level

Key Responsibilities

•Design high-speed D2D and SERDES blocks at industry data rates on leading-edge technology nodes.
•Develop analog/mixed-signal IC circuit blocks from concept to verification against customer specs.
•Collaborate with Layout Design Engineers to shape circuit blocks and PMA sections.
•Partner with Technical Team Leads on circuit design and SERDES architectures.
•Coordinate with global teams across multiple time zones to align on design deliverables.

Key Requirements

•BEng, MEng, PhD or equivalent.

Experience:8+ yearsSemiconductorCMOSSERDESHigh-speed I/O

Education:Master's

Skills:Analogue designCAD toolsCommunicationTeamwork

Tech Stack:CMOSSERDESHigh-speed I/OCadence3nm FinFET CMOS

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

1 month ago

Sr Principal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Sr. Manager level

Key Responsibilities

•Design high-speed D2D and SERDES blocks at industry data rates on leading-edge technology nodes.
•Develop analog/mixed-signal IC circuit blocks from concept to verification against customer specs.
•Collaborate with Layout Design Engineers to shape circuit blocks and PMA sections.
•Partner with Technical Team Leads on circuit design and SERDES architectures.
•Coordinate with global teams across multiple time zones to align on design deliverables.

Key Requirements

•BEng, MEng, PhD or equivalent.

Experience:8+ yearsSemiconductorCMOSSERDESHigh-speed I/O

Education:Master's

Skills:Analogue designCAD toolsCommunicationTeamwork

Tech Stack:CMOSSERDESHigh-speed I/OCadence3nm FinFET CMOS

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor