Principal Engineer-TD Foundry Engineering

Intel
United States
Workplace: HybridFull timeUSD 220,920 - 311,890 annuallyFunction: Communications, PR & CommunityEducation: mastersSkills: ["Strategic leadership","Executive communication","Cross-functional collaboration","Customer orientation","Risk management"]

Lead foundry process technology strategy for Intel’s Logic Technology Development organization, guiding customers from design tape-out through pre-silicon evaluation to NPI silicon qualification and HVM ramp. Own yield and performance governance, predictive modeling using AI/ML, metric correlation frameworks, and systemic loss mitigation. Drive NPI execution, PDK and simulation correlation standards (Sil2Sim), waiver/risk governance, IP and design rule planning, and serve as the executive technical liaison to external customers and internal leadership.

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Intel
Intel
6 days ago

Principal Engineer-TD Foundry Engineering

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Last checked: 6 hours agoStatus: Live

Job Summary

Lead foundry process technology strategy for Intel’s Logic Technology Development organization, guiding customers from design tape-out through pre-silicon evaluation to NPI silicon qualification and HVM ramp. Own yield and performance governance, predictive modeling using AI/ML, metric correlation frameworks, and systemic loss mitigation. Drive NPI execution, PDK and simulation correlation standards (Sil2Sim), waiver/risk governance, IP and design rule planning, and serve as the executive technical liaison to external customers and internal leadership.
Location: United States
Workplace: Hybrid
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Mid level

Key Responsibilities

  • •Establish yield and performance governance, define long-term yield/performance roadmaps, and lead systemic loss mitigation across process integration, device engineering, and defect metrology.
  • •Oversee predictive modeling using AI/ML for parametric and defective loss, and define metric correlation standards linking inline process metrics to end-of-line yield and performance.
  • •Direct NPI execution, including wafer lot progress, skew split strategy, and targeting for flagship customer products; lead device performance analysis across logic, SRAM, and emerging device types.
  • •Architect Design of Experiments (DOE) and skew split plans, ensure compliance with customer technology metrics (fab process yield, E-Test, WAT/C, Cp/Cpk), and chair executive guidance for waiver/risk decisions.
  • •Serve as executive technical liaison to external foundry customers, own POR deliverables, resolve critical technical blockers, and drive operational standardization and end-to-end integration across development, assembly, and test.

Pay and Benefits

Salary: USD 220,920 - 311,890 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •Master’s degree with 13+ years of experience or PhD with 10+ years in industry, in relevant engineering or physical science disciplines.
  • •Experience in semiconductor integration, device engineering, or yield engineering within the stated years.
  • •10+ years of direct semiconductor yield and performance analysis with strategic engineering leadership.
  • •Proven track record in yield pareto construction, modeling, projection, and building long-term yield roadmaps.
  • •Experience leading foundry teams or high-level customer collaborations and interpreting inline, e-test, and SORT data.
Experience:Semiconductor manufacturingFoundryYield engineeringProcess integration
Education:Master's
Skills:Strategic leadershipExecutive communicationCross-functional collaborationCustomer orientationRisk management
Tech Stack:AI/MLPredictive modelingYield strategyProcess integrationDevice engineeringDefect metrologyNew Product Introduction (NPI)Design of Experiments (DOE)PDKsSil2SimDRCWaiver Review Board (WRB)Cp/CpkSORTE-TestInline inspectionWAT/CSkew split

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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