ASIC Design Engineer, Clocks

Join NVIDIA’s GPU clocks group as a Senior ASIC Design Engineer focused on high-frequency, low-power clocks for GPU chips. Collaborate with architects, ASIC designers, and verification/backend teams to design RTL clocks, ensure clock quality, and deliver clock data to SOC verification, timing, and DFT teams. Proficiency in Verilog and scripting (Perl/Python) and strong communication are essential.