IP Verification Lead with PCIe

AMD
Bengaluru
Workplace: OnsiteFull timeINR 4,860,800 - 6,944,000 annuallyFunction: Administration & Executive AssistanceSkills: ["Communication","Team collaboration","Analytical skills","Problem-solving","Willingness to learn"]

Plan, build, and execute verification plans for AMD FPGA and ASIC IPs to deliver bug-free final designs. Collaborate with architects, hardware and firmware engineers to understand requirements, create test plan documentation, and develop UVM-based testbenches using directed and random test cases. Debug failures, drive bug finding and coverage convergence, and provide silicon debug support with partner verification and validation teams. Use AI to improve efficiency and automation.

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FursaFursa
AMD
AMD
2 months ago

IP Verification Lead with PCIe

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Plan, build, and execute verification plans for AMD FPGA and ASIC IPs to deliver bug-free final designs. Collaborate with architects, hardware and firmware engineers to understand requirements, create test plan documentation, and develop UVM-based testbenches using directed and random test cases. Debug failures, drive bug finding and coverage convergence, and provide silicon debug support with partner verification and validation teams. Use AI to improve efficiency and automation.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand product requirements.
  • •Plan, build, and execute the verification plan for AMD FPGA and ASIC IPs.
  • •Build test plan documentation for functionality, performance, and product use cases.
  • •Develop UVM-based testbenches with directed and random test cases to ensure high-quality design.
  • •Debug test failures, drive bug finding and coverage convergence, and provide silicon debug support with partner teams.

Pay and Benefits

Salary: INR 4,860,800 - 6,944,000 annually

Key Requirements

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand product requirements.
  • •Develop and execute verification plans for AMD FPGA and ASIC IPs to achieve no bugs in the final design.
  • •Proficiency with UVM testbenches, directed and random test cases, and developing UVM verification frameworks and testbenches.
  • •Experienced with Verilog and SystemVerilog and hands-on understanding of UVM concepts.
  • •Knowledge of PCIe, CXL or other IO protocols (PCIe/CXL required) and proficiency in IP-level ASIC verification (preferred).
Experience:ASIC verificationFPGAEmbedded systemsProcessor architectureIO protocolsSilicon debug
Education:
Skills:CommunicationTeam collaborationAnalytical skillsProblem-solvingWillingness to learn
Languages:English
Tech Stack:FPGAASICUVMVerilogSystemVerilogPCIeCXLLinuxWindowsPerlMakefileShellAILLMsAI agentsDMAHLS toolsSimulation profile

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn