Senior layout Engineer – DPG Layout

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Solutions Engineering & Sales EngineeringExperience: 3+ yearsSkills: ["Problem-solving","Collaboration","Communication"]

Own block-level analog, mixed-signal, and custom digital layout execution and support full-chip integration using traditional layout expertise. Perform and close layout verification (DRC, LVS, antenna checks) and quality/yield checks, delivering on-time, high-quality layouts. Automate repetitive layout and verification with prompt-based AI tools by generating/refining SKILL/Python/TCL scripts. Collaborate across Design, Verification, CAD, and senior layout engineers to communicate status, risks, and integrate ECO updates.

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FursaFursa
Micron Technology
Micron Technology
3 weeks ago

Senior layout Engineer – DPG Layout

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Own block-level analog, mixed-signal, and custom digital layout execution and support full-chip integration using traditional layout expertise. Perform and close layout verification (DRC, LVS, antenna checks) and quality/yield checks, delivering on-time, high-quality layouts. Automate repetitive layout and verification with prompt-based AI tools by generating/refining SKILL/Python/TCL scripts. Collaborate across Design, Verification, CAD, and senior layout engineers to communicate status, risks, and integrate ECO updates.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Implement analog, mixed-signal, custom digital block design and physical layout, supporting full-chip integration.
  • •Own block-level layout execution with focus on quality, turnaround time, and preserving design intent.
  • •Perform and close layout verification activities including DRC, LVS, antenna checks, and related yield/quality checks.
  • •Generate or refine SKILL/Python/TCL scripts using prompt-based AI tools to automate repetitive layout and verification tasks.
  • •Collaborate with Design, Verification, CAD, and senior layout engineers; communicate layout status and risks and support custom/digital layout integration for ECO updates.

Key Requirements

  • •3+ years of experience in analog/custom layout design in advanced CMOS process.
  • •Hands-on experience with Cadence Virtuoso (VLE/VXL) and Calibre DRC/LVS, including ownership of verification and closure for assigned blocks.
  • •Experience laying out critical analog/mixed-signal blocks such as temperature sensors, PLLs, ADCs, DACs, LDOs, bandgaps, reference generators, and charge pumps.
  • •Exposure to memory layout environments including DRAM, SRAM, CAM, or OTP is desirable.
  • •Strong understanding of analog layout fundamentals and how layout affects circuit performance; ability to interpret design constraints into manufacturable layouts.
Experience:3+ years
Skills:Problem-solvingCollaborationCommunication
Tech Stack:Cadence VirtuosoVLEVXLCalibreDRCLVSSKILLPythonTCLSemicustomECOAntenna checks

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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