Sr. Memory Layout Design Engineer

Broadcom
India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10-12 yearsEducation: mastersSkills: ["Communication","Team leadership","Independent work","Collaboration","Project management"]

Design high-quality memory physical layouts for submicron process nodes, applying layout guidelines, new process rules, and technical requirements. Own end-to-end deliverables by managing scheduling, timelines, and layout floor-planning, while coordinating with SOC and library teams. Perform and validate physical verification (LVS/DRC/ERC, Antenna, Electro Migration) using Cadence and verification tools, and improve methodologies through technology reviews and automation.

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FursaFursa
Broadcom
Broadcom
1 month ago

Sr. Memory Layout Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 27 days agoStatus: Live

Job Summary

Design high-quality memory physical layouts for submicron process nodes, applying layout guidelines, new process rules, and technical requirements. Own end-to-end deliverables by managing scheduling, timelines, and layout floor-planning, while coordinating with SOC and library teams. Perform and validate physical verification (LVS/DRC/ERC, Antenna, Electro Migration) using Cadence and verification tools, and improve methodologies through technology reviews and automation.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Understand and apply layout guidelines, new process rules, and technical requirements for high-quality layouts.
  • •Manage scheduling, timelines, and layout floor-planning for memory layout deliverables.
  • •Ensure end-to-end deliverables are completed with high quality within the planned schedule.
  • •Adapt quickly to new methodologies and communicate effectively with SOC and library teams.
  • •Lead technology reviews and document layout methodologies, flows, and guidelines; support automation via scripts/SKILL.

Key Requirements

  • •Bachelor’s degree with 12 years of experience or a Master’s degree with over 10 years of experience.
  • •Proficiency with Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture) and verification tools (Calibre, Hercules).
  • •Strong layout knowledge in submicron processes (7nm, 5nm, 3nm, 2nm).
  • •Experience with memory layout design and physical verification (LVS, DRC, ERC, Antenna, Electro Migration).
  • •Solid understanding of memory architecture and RC requirements, including signal/power routing; ability to lead teams and train junior engineers.
Experience:10-12 years
Education:Master's
Skills:CommunicationTeam leadershipIndependent workCollaborationProject management
Tech Stack:Cadence Virtuoso LayoutCadence Layout XLCadence Schematic CaptureCalibreHerculesVirtuoso XLLayout XLVXLEXLLVSDRCERCAntennaElectro MigrationFloor-planningHierarchy layoutMemory compilersSKILLLayout automationAI

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn