Lead Software Engineer

Cadence Design Systems
Noida
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 4+ yearsEducation: bachelorsSkills: ["Analytical skills","Communication skills","Written skills","Verbal skills","Teamwork & collaboration"]

Lead development of an IP/VIP and SoC-level verification environment, combining UVM with software-driven (embedded C) approaches. Work with advanced interconnect and protocol technologies such as UCIe, PCIe, CXL, UAlink, and Ethernet, applying strong design and verification methodologies. Build expertise quickly across new technologies and independently, while demonstrating strong analytical, communication, and collaboration skills across teams and geographies.

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FursaFursa
Cadence Design Systems
Cadence Design Systems
1 month ago

Lead Software Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 12 hours agoStatus: Live
Reposted: similar role first listed 9 months ago

Job Summary

Lead development of an IP/VIP and SoC-level verification environment, combining UVM with software-driven (embedded C) approaches. Work with advanced interconnect and protocol technologies such as UCIe, PCIe, CXL, UAlink, and Ethernet, applying strong design and verification methodologies. Build expertise quickly across new technologies and independently, while demonstrating strong analytical, communication, and collaboration skills across teams and geographies.
Location: Noida
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop IP/VIP and SoC-level verification environments using UVM and software-driven (embedded C) approaches.
  • •Apply knowledge of protocols (UCIe, PCIe, CXL, UAlink, Ethernet) in verification/engineering work.
  • •Demonstrate strong understanding of design and verification methodologies.
  • •Ramp up quickly and independently on new technologies.
  • •Collaborate effectively with customer peers and management, communicating clearly.

Key Requirements

  • •Proficiency in C, C++ programming and scripting languages.
  • •Knowledge of protocols such as UCIe, PCIe, CXL, UAlink, and Ethernet.
  • •Background developing IP/VIP and SoC-level verification environments using UVM and SW-driven (embedded C).
  • •Strong interest and understanding of design and verification methodologies.
  • •M.Tech/M.E. or BE/BTech in Electrical/Electronics/Computer Engineering with 4+ years of relevant experience.
Experience:4+ years
Education:Bachelor's in Electrical/Electronics/Computer Engineering
Skills:Analytical skillsCommunication skillsWritten skillsVerbal skillsTeamwork & collaboration
Tech Stack:CC++UVMEmbedded CUCIePCIeCXLUAlinkEthernetIP/VIPSoC verification

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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