NVIDIA

2 weeks ago

Custom SOC IP Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Verify next-generation custom SoCs and IP by validating on-chip fabric and interconnect subsystems from IP bring-up through full chip integration. Own ASIC verification work covering DMA, routing, arbitration, ordering, flow control, and protocol compliance. Build UVM-based verification test plans and develop constrained-random and directed SystemVerilog testbenches for NoC topologies and multi-agent integrations, collaborating across Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon teams.

Location: Santa Clara, Austin

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Perform ASIC design verification for fabric and interconnect IP blocks and full chip integration, including DMA, routing, arbitration, ordering, flow control, and protocol compliance.
•Develop and implement test plans for fabric and interconnect verification using UVM-based environments for both IP-level and system-level scenarios.
•Create constrained-random and directed SystemVerilog testbenches for interconnect fabrics, NoC topologies, and multi-agent SoC integrations.
•Collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to deliver comprehensive first-time right verification plans.
•Drive silicon and platform verification strategies and methodologies for fabric and interconnect subsystems.

Pay and Benefits

Salary: USD 168,000 - 310,500 annually

Equity and Bonus:Equity

Key Requirements

•B.S. or M.S. in Computer Engineering, Electrical Engineering, or related field (or equivalent experience).
•6+ years of ASIC verification experience focused on fabric, interconnect, or network-on-chip verification at both IP and full chip levels.
•Strong knowledge of SystemVerilog and UVM verification methodology.
•Hands-on experience with industry-standard interconnect and bus protocols such as AMBA AXI and CHI, including ordering/coherency/flow-control semantics.
•Proficiency in scripting languages including Python, Perl, and TCL, plus familiarity with SoC architectures and NoC topologies.

Experience:6+ yearsASIC verificationSoCNetwork-on-chip (NoC)InterconnectGPU/AI accelerator SoCs

Education:Bachelor's in Computer Engineering, Electrical Engineering (or related field)

Tech Stack:SystemVerilogUVMPythonPerlTCLAMBA AXICHISVAAssertion-based verificationNoCNetwork-on-chipDMAPalladiumVeloce

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

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NVIDIA

2 weeks ago

Custom SOC IP Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Location: Santa Clara, Austin

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Perform ASIC design verification for fabric and interconnect IP blocks and full chip integration, including DMA, routing, arbitration, ordering, flow control, and protocol compliance.
•Develop and implement test plans for fabric and interconnect verification using UVM-based environments for both IP-level and system-level scenarios.
•Create constrained-random and directed SystemVerilog testbenches for interconnect fabrics, NoC topologies, and multi-agent SoC integrations.
•Collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to deliver comprehensive first-time right verification plans.
•Drive silicon and platform verification strategies and methodologies for fabric and interconnect subsystems.

Pay and Benefits

Salary: USD 168,000 - 310,500 annually

Equity and Bonus:Equity

Key Requirements

•B.S. or M.S. in Computer Engineering, Electrical Engineering, or related field (or equivalent experience).
•6+ years of ASIC verification experience focused on fabric, interconnect, or network-on-chip verification at both IP and full chip levels.
•Strong knowledge of SystemVerilog and UVM verification methodology.
•Hands-on experience with industry-standard interconnect and bus protocols such as AMBA AXI and CHI, including ordering/coherency/flow-control semantics.
•Proficiency in scripting languages including Python, Perl, and TCL, plus familiarity with SoC architectures and NoC topologies.

Experience:6+ yearsASIC verificationSoCNetwork-on-chip (NoC)InterconnectGPU/AI accelerator SoCs

Education:Bachelor's in Computer Engineering, Electrical Engineering (or related field)

Tech Stack:SystemVerilogUVMPythonPerlTCLAMBA AXICHISVAAssertion-based verificationNoCNetwork-on-chipDMAPalladiumVeloce

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor