Cerebras

5 months ago

Senior/Staff Engineer : Post Silicon- Bring Up

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Bring up and optimize Cerebras’s Wafer Scale Engine (WSE) by developing and debugging production-ready flows, instrumentation, and self-checking metrics. Work across hardware/software design constraints and collaborate with silicon architects, performance engineers, and software teams to improve performance and process for real-world workload testing. Partner across verification, emulation, and validation, while streamlining test and release through CI/CD, Git, and automation tooling.

Location: Sunnyvale, Bengaluru, Toronto

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Develop and debug bring-up flows for Wafer Scale Engines, embedding well-tested, deployable optimizations to reduce time and costs.
•Refine AI system performance across H/W-S/W constraints (di/dt, V-F characterization, current/temperature limits) to optimize performance.
•Develop and enhance infrastructure for silicon testing on real-world workloads, including self-checking metrics and instrumentation for debug and coverage.
•Collaborate with silicon architects/designers, performance engineers, and software engineers to enhance WSE performance across software, design, verification, emulation, and validation.
•Use CI/CD and repository workflows (Git, GitHub, GitHub Actions/Jenkins, merge and release flows) to streamline testing and release.

Pay and Benefits

Salary: USD 175,000 - 275,000 annually

Equity and Bonus:Equity

Key Requirements

•BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS (or equivalent experience).
•7-10+ years of industry experience.
•3-5 years of experience in pre-silicon and post-silicon ASIC hardware.
•Excellent coding in Python, Verilog, SystemVerilog, and C.
•Proficiency in hardware/software codesign, debugging, and large-scale testing/automation (pytest and Python).

Experience:7+ yearsASIC hardware

Education:Bachelor's

Skills:DebuggingAnalytical thinkingProblem-solvingCross-functional collaborationPresentation

Tech Stack:PythonVerilogSystem VerilogCPytestGitGitHubGitHub ActionsJenkins

Company Brief

Cerebras

Designs and builds wafer-scale AI accelerators and systems for large-scale deep learning workloads, delivering specialized hardware and software to accelerate model training and inference for enterprises and research institutions.

Industry: Hardware Devices

Company Size: Large (251 to 1,000 employees)

Growth: Scaleup

Headquarters: Sunnyvale, United States

Founded: 2016

Website LinkedIn

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Cerebras

5 months ago

Senior/Staff Engineer : Post Silicon- Bring Up

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: Sunnyvale, Bengaluru, Toronto

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Develop and debug bring-up flows for Wafer Scale Engines, embedding well-tested, deployable optimizations to reduce time and costs.
•Refine AI system performance across H/W-S/W constraints (di/dt, V-F characterization, current/temperature limits) to optimize performance.
•Develop and enhance infrastructure for silicon testing on real-world workloads, including self-checking metrics and instrumentation for debug and coverage.
•Collaborate with silicon architects/designers, performance engineers, and software engineers to enhance WSE performance across software, design, verification, emulation, and validation.
•Use CI/CD and repository workflows (Git, GitHub, GitHub Actions/Jenkins, merge and release flows) to streamline testing and release.

Pay and Benefits

Salary: USD 175,000 - 275,000 annually

Equity and Bonus:Equity

Key Requirements

•BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS (or equivalent experience).
•7-10+ years of industry experience.
•3-5 years of experience in pre-silicon and post-silicon ASIC hardware.
•Excellent coding in Python, Verilog, SystemVerilog, and C.
•Proficiency in hardware/software codesign, debugging, and large-scale testing/automation (pytest and Python).

Experience:7+ yearsASIC hardware

Education:Bachelor's

Skills:DebuggingAnalytical thinkingProblem-solvingCross-functional collaborationPresentation

Tech Stack:PythonVerilogSystem VerilogCPytestGitGitHubGitHub ActionsJenkins

Company Brief

Cerebras

Industry: Hardware Devices

Company Size: Large (251 to 1,000 employees)

Growth: Scaleup

Headquarters: Sunnyvale, United States

Founded: 2016

Website LinkedIn