Arista Networks

1 month ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 20 hours agoStatus: Live

Job Summary

Senior hardware engineer specializing in signal and power integrity for high-speed SerDes interconnects, collaborating with hardware, mechanical, and packaging teams to optimize routing, materials, and power delivery for 112G/224G PAM4 and beyond in data-center networking hardware.

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Seniority: Sr. Manager level

Key Responsibilities

•Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity.
•Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects.
•Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation.
•Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI.
•Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs.

Key Requirements

•BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design.
•Solid understanding of signal integrity theory, S-parameter analysis, and channel modeling.
•Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST).
•Strong lab skills using oscilloscopes, VNAs, TDRs, BERTs, and Ethernet compliance tools.
•Experience analyzing and simulating 56G/112G/224G PAM4 and NRZ serial links.

Experience:Computer networkingHardware engineeringHigh-speed signaling

Education:Bachelor's in Electrical Engineering

Skills:HFSSSiWaveSigrityCSTCadence SigrityKeysight ADSCadence SystemSIVNATDRBERTEthernet compliance tools

Languages:English

Tech Stack:HFSSSiWaveSigrityCSTCadenceKeysight ADSSystemSIVNATDRBERT

Company Brief

Arista Networks

Designs and sells high-performance cloud networking hardware and software for large-scale data centers and enterprise environments, including switches, routers, and network operating systems focused on programmability, telemetry, and low-latency networking.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 2004

Glassdoor: 4.1

Website LinkedIn

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Arista Networks

1 month ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 20 hours agoStatus: Live

Job Summary

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Seniority: Sr. Manager level

Key Responsibilities

•Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity.
•Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects.
•Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation.
•Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI.
•Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs.

Key Requirements

•BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design.
•Solid understanding of signal integrity theory, S-parameter analysis, and channel modeling.
•Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST).
•Strong lab skills using oscilloscopes, VNAs, TDRs, BERTs, and Ethernet compliance tools.
•Experience analyzing and simulating 56G/112G/224G PAM4 and NRZ serial links.

Experience:Computer networkingHardware engineeringHigh-speed signaling

Education:Bachelor's in Electrical Engineering

Skills:HFSSSiWaveSigrityCSTCadence SigrityKeysight ADSCadence SystemSIVNATDRBERTEthernet compliance tools

Languages:English

Tech Stack:HFSSSiWaveSigrityCSTCadenceKeysight ADSSystemSIVNATDRBERT

Company Brief

Arista Networks

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 2004

Glassdoor: 4.1

Website LinkedIn