Senior ASIC Verification Engineer - PMU
Shanghai
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 3+ yearsEducation: mastersSkills: ["Communication","Collaboration","Systems thinking","Debugging","Architecture"]Help architect and implement the next-generation PMU for NVIDIA AI datacenter chips, using the PMU’s RISC-V core and custom control logic to optimize power efficiency in idle and active scenarios. Collaborate with production SW and power architecture teams to define power feature micro-architecture, support silicon debug, and implement micro-architecture to RTL design. Work closely with external teams across USA and India.
