Sr. Staff Silicon Development Engineer

AMD
San Jose
Workplace: HybridFull timeUSD 200,000 - 300,000 annuallyFunction: Product ManagementSkills: ["Detail-oriented","Communication","Problem-solving"]

Join the Radeon Technologies Group front-end design/integration team to help achieve first-pass silicon success. You will implement and verify DFT architecture and features, build and validate scan insertion and ATPG pattern generation, and use gate-level simulation for ATPG verification. The role also includes test coverage and test cost reduction analysis and providing post-silicon support to improve bring-up yield learning.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
AMD
AMD
2 days ago

Sr. Staff Silicon Development Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 22 hours agoStatus: Live

Job Summary

Join the Radeon Technologies Group front-end design/integration team to help achieve first-pass silicon success. You will implement and verify DFT architecture and features, build and validate scan insertion and ATPG pattern generation, and use gate-level simulation for ATPG verification. The role also includes test coverage and test cost reduction analysis and providing post-silicon support to improve bring-up yield learning.
Location: San Jose
Workplace: Hybrid
Employment Type: Full time
Job Function: Product Management
Seniority: Sr. Manager level

Key Responsibilities

  • •Implement and verify DFT architecture and features.
  • •Perform scan insertion and ATPG pattern generation.
  • •Verify ATPG patterns with gate-level simulation.
  • •Analyze test coverage and test cost reduction.
  • •Provide post-silicon support to ensure successful bring-up and enhance yield learning.

Pay and Benefits

Salary: USD 200,000 - 300,000 annually

Key Requirements

  • •Understanding of Design for Test (DFT) methodologies and DFT verification experience (e.g., IEEE1500, JTAG 1149.x, Scan, memory BIST).
  • •Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX.
  • •Experience with VCS simulation tools, Perl/Shell scripting, and Verilog RTL design.
  • •Bachelor's or master's degree in computer engineering or electrical engineering.
  • •Highly accurate, detail-oriented, with strong communication and problem-solving skills.
Education:
Skills:Detail-orientedCommunicationProblem-solving
Languages:English
Tech Stack:DFTScan insertionATPGIEEE1500JTAG 1149.xMemory BISTMentor testkompressSynopsys TetramaxDFTMAXVCS simulationPerlShell scriptingVerilog RTLGate-level simulation

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn