Backend EDA Compiler Engineer

Partcl
San Francisco
Workplace: OnsiteFull timeUSD 130,000 - 300,000 annuallyFunction: Software EngineeringSkills: ["Rust","Python","C++","CUDA","LLVM","MLIR","SPEF","GDS","LEF/DEF","Liberty","Parquet","Arrow"]

Lead the design and implementation of compiler-like IR infrastructure for chip-design automation. You will build high-performance data models and pipelines to transform design data through netlist, floorplan, PnR, and sign-off stages, with a focus on large graphs, correctness, and scalable performance in a distributed hardware design environment.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Partcl
Partcl
7 months ago

Backend EDA Compiler Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live

Job Summary

Lead the design and implementation of compiler-like IR infrastructure for chip-design automation. You will build high-performance data models and pipelines to transform design data through netlist, floorplan, PnR, and sign-off stages, with a focus on large graphs, correctness, and scalable performance in a distributed hardware design environment.
Location: San Francisco
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering

Key Responsibilities

  • •Design the core intermediate representations that physical-design tools use to reason about chips.
  • •Build compiler-like pipelines that lower, normalize, and transform design data across stages (netlist → floorplan → PnR → sign-off).
  • •Architect the physical-design data model as a first-class IR, not just a storage format.
  • •Create high-performance loaders, serializers, and transformation passes for LEF/DEF, Liberty, SPEF, GDS.
  • •Develop APIs that make analysis and optimization passes fast to write and reason about.

Pay and Benefits

Salary: USD 130,000 - 300,000 annually

Key Requirements

  • •Strong background in compilers or IR design (LLVM, MLIR, TVM, CIRCT, or equivalent)
  • •Proficiency in Rust for low-level systems work; Python for tooling and pipelines
  • •Experience designing data structures for large graphs / sparse relations / geometric data
  • •Understanding of incremental computation, dependency tracking, and versioning of IR states
  • •Ability to reason about correctness, determinism, and reproducibility in complex toolchains
Experience:EDAChip designCompilersIR design
Skills:RustPythonC++CUDALLVMMLIRSPEFGDSLEF/DEFLibertyParquetArrow
Tech Stack:RustPythonC++CUDALLVMMLIRSPEFGDSLEF/DEFLibertyArrowParquet

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

Partcl
Operates an online manufacturing marketplace connecting engineers and buyers with vetted manufacturers and suppliers for custom parts, prototypes, and production runs. Provides quoting, order management, and supplier verification to streamline sourcing of machined, sheet metal, and fabricated components.
Industry: Online Marketplaces
Website