Design Verification Engineer

AMD
Shanghai
Workplace: OnsiteFull timeCNY 682,360 - 974,800 annuallyFunction: Design (Product/UX/UI/Visual)Skills: ["Communication","Technical leadership","Execution excellence","Problem-solving","Decision-making"]

Own SOC chip verification and emulation delivery with global IP and SOC design teams. Drive SOC feature verification, build emulation model development, and support FW/SW verification while analyzing performance and power. Provide technical leadership across multiple verification areas to ensure project delivery. Work across functional completeness via test plans, validation vectors, UVM/SystemVerilog testbenches, and deep debugging of complex graphics and emulation issues.

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FursaFursa
AMD
AMD
15 hours ago

Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Own SOC chip verification and emulation delivery with global IP and SOC design teams. Drive SOC feature verification, build emulation model development, and support FW/SW verification while analyzing performance and power. Provide technical leadership across multiple verification areas to ensure project delivery. Work across functional completeness via test plans, validation vectors, UVM/SystemVerilog testbenches, and deep debugging of complex graphics and emulation issues.
Location: Shanghai
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Work with global IP and SOC design teams to implement large-scale SOC verification and emulation.
  • •Focus on SOC feature verification, emulation model development, and FW/SW verification.
  • •Perform performance and power analysis as part of verification deliverables.
  • •Provide technical leadership across multiple verification areas and ensure on-time project delivery.
  • •Create verification content such as testbenches, monitors, validation vectors, and debugging of function/performance issues.

Pay and Benefits

Salary: CNY 682,360 - 974,800 annually

Key Requirements

  • •Experience/knowledge in IP or SOC verification methodology, formal verification, and emulation.
  • •Build and deliver verification assets including testbench/monitors for DUT using UVM and SystemVerilog.
  • •RTL coding experience with Verilog/SystemVerilog and familiarity with C/C++ programming for simulation models.
  • •Experience with emulation environments and platforms/tools such as Mentor’s Veloce and Synopsys’ Zebu.
  • •Master’s in EE/CS (or related) with 5+ years, or bachelor’s with 7+ years working experience.
Experience:SemiconductorSoCGPUGraphics chips
Education:
Skills:CommunicationTechnical leadershipExecution excellenceProblem-solvingDecision-making
Languages:English
Tech Stack:IP verificationSOC verificationFormal verificationEmulationGPU architectureX86ARMPCIeAXIACE busUSBHSICGDDRLPDDRJTAGVerilogSystemVerilogUVMRTL codingC

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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