PDK Engineer

Intel
Bengaluru
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringEducation: bachelorsSkills: ["Debugging","Analytical thinking","Problem-solving","Ownership","Attention to quality"]

Develop, validate, and support DRC runsets/rule decks for advanced semiconductor process technology nodes. Translate process design rules into accurate physical verification checks using Siemens Calibre, Synopsys ICV, and Cadence Pegasus, and build test cases and regression suites to ensure coverage and correctness. Debug runset issues, improve quality and runtime efficiency, and collaborate with process development teams, design rule owners, and CAD/EDA groups to resolve production/user-reported problems using automation and scripting.

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FursaFursa
Intel
Intel
1 day ago

PDK Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live

Job Summary

Develop, validate, and support DRC runsets/rule decks for advanced semiconductor process technology nodes. Translate process design rules into accurate physical verification checks using Siemens Calibre, Synopsys ICV, and Cadence Pegasus, and build test cases and regression suites to ensure coverage and correctness. Debug runset issues, improve quality and runtime efficiency, and collaborate with process development teams, design rule owners, and CAD/EDA groups to resolve production/user-reported problems using automation and scripting.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Develop, maintain, and support DRC runsets/rule decks for advanced semiconductor process nodes.
  • •Translate process design rules into accurate and efficient physical verification checks.
  • •Develop and validate geometric, connectivity, density, and process-specific design rule checks using Calibre, ICV, and Pegasus.
  • •Create test cases to validate rule deck functionality, coverage, and correctness, including regression suites.
  • •Debug DRC rule deck issues and resolve user/customer-reported problems while improving quality and runtime efficiency.

Key Requirements

  • •4+ years experience with a Bachelor's degree, or 2+ years experience with a Master's degree in Electronics, VLSI, Computer Engineering, or related field.
  • •Strong experience developing and maintaining DRC rule decks/runsets for semiconductor technologies.
  • •Hands-on expertise with one or more physical verification tools: Siemens Calibre, Synopsys ICV, Cadence Pegasus.
  • •Good understanding of semiconductor manufacturing process, layout design rules, and physical verification concepts.
  • •Strong programming/scripting skills (Python, Perl, Tcl, Shell) and ability to write/debug/optimize DRC checks and validation test cases.
Experience:SemiconductorVLSIPhysical verificationEDACAD/EDA
Education:Bachelor's in Electronics, VLSI, Computer Engineering, or a related field
Skills:DebuggingAnalytical thinkingProblem-solvingOwnershipAttention to quality
Tech Stack:DRCRunsetsRule decksSiemens CalibreSynopsys ICVCadence PegasusCadence VirtuosoCalibre DRVIC WorkBenchPythonPerlTclShell scripting

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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