Cadence Design Systems

3 months ago

Foundry Virtuoso Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 10 hours agoStatus: Live

Job Summary

Provide technical support for Virtuoso-based analog backend flows (schematic, layout, and design environment usage), assist with PDK adoption from a foundry perspective, and help maintain Virtuoso techfiles and PCells. Collaborate with product engineers and R&D to address customer issues, participate in foundry engagements, and contribute to QA workflows. 3+ years in IC design/foundry with a BS (MS preferred).

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Provide technical support for Virtuoso-based analog backend flows, including schematic, layout, and design environment usage.
•Assist in PDK usage and enablement from a foundry perspective, ensuring correct adoption of process rules and recommended flows in Virtuoso.
•Assist foundry teams in the development and maintenance of Virtuoso technology files (techfiles), PCells, and related QA flow.
•Work with product engineers and R&D teams to communicate customer issues and feedback, and help track resolution under guidance from senior engineers.
•Participate in foundry-related customer engagements as needed, focusing on tool usage, flow clarification, and issue reproduction.

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Science with 3+ years of experience in an IC design house or foundry.
•MS degree is desired.
•Experience with Virtuoso-based analog backend flows (schematic, layout, and design environment usage).
•Experience with PDK usage and enablement from a foundry perspective.
•Experience with Virtuoso techfiles and PCells QA flow.

Experience:3+ yearsSemiconductorIC designEDAFoundryVirtuoso

Education:Bachelor's in Electrical Engineering or Computer Science

Skills:Problem-solvingTeam collaboration

Languages:English

Tech Stack:VirtuosoPDKTechfilesPCells

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

3 months ago

Foundry Virtuoso Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 10 hours agoStatus: Live

Job Summary

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Provide technical support for Virtuoso-based analog backend flows, including schematic, layout, and design environment usage.
•Assist in PDK usage and enablement from a foundry perspective, ensuring correct adoption of process rules and recommended flows in Virtuoso.
•Assist foundry teams in the development and maintenance of Virtuoso technology files (techfiles), PCells, and related QA flow.
•Work with product engineers and R&D teams to communicate customer issues and feedback, and help track resolution under guidance from senior engineers.
•Participate in foundry-related customer engagements as needed, focusing on tool usage, flow clarification, and issue reproduction.

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Science with 3+ years of experience in an IC design house or foundry.
•MS degree is desired.
•Experience with Virtuoso-based analog backend flows (schematic, layout, and design environment usage).
•Experience with PDK usage and enablement from a foundry perspective.
•Experience with Virtuoso techfiles and PCells QA flow.

Experience:3+ yearsSemiconductorIC designEDAFoundryVirtuoso

Education:Bachelor's in Electrical Engineering or Computer Science

Skills:Problem-solvingTeam collaboration

Languages:English

Tech Stack:VirtuosoPDKTechfilesPCells

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor