Senior Engineer - Memory Circuit Design Verification
Hyderabad
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: mastersSkills: ["Communication","Debugging","Teamwork"]Own verification for DRAM critical timings using fastSPICE-based flows to support sign-off of memory circuit designs. Simulate, analyze, and debug pre-silicon full-chip analog spice simulations across PVTs and speed grades, and develop SPICE testbenches, stimuli, and regressions to improve functional coverage. Contribute to verification methodology and environments, build test benches/vectors, and collaborate with cross-geo teams to develop new verification flows for DRAM and emerging memory architectures.
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