Silicon Design Verification Engineer
Austin
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Skills: ["SystemVerilog","UVM","Verilog","VCS","Cadence IES","SystemVerilog Assertions","AXI3/4","DDR4","DDR5","HBM","PCIe"]Join AMD as a Silicon Design Verification Engineer to drive verification of complex digital blocks for cutting-edge processor architectures. You will design testbenches in SystemVerilog/UVM, develop constrained-random environments, and use formal verification tools to close verification holes. Collaborate with architects and design engineers across sites to deliver high-quality, market-leading technologies in a hybrid/onsite team based in Austin, TX.

