Senior Digital Design Engineer, Air Dominance and Strike

Anduril
United States
Workplace: OnsiteFull timeUSD 166,000 - 220,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Communication","Collaboration"]

Design and integrate RTL for FPGA and SoC platforms supporting high-performance embedded systems, avionics, and mission-critical hardware. Own FPGA designs or key functional blocks through requirements translation, microarchitecture, implementation, simulation, synthesis, timing closure, and lab debug. Execute system integration and board bring-up, partnering with hardware, embedded software, systems, and verification engineers to deliver flight-ready capabilities for air dominance and strike platforms.

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Anduril
Anduril
6 days ago

Senior Digital Design Engineer, Air Dominance and Strike

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live
Reposted: similar role first listed 2 months ago

Job Summary

Design and integrate RTL for FPGA and SoC platforms supporting high-performance embedded systems, avionics, and mission-critical hardware. Own FPGA designs or key functional blocks through requirements translation, microarchitecture, implementation, simulation, synthesis, timing closure, and lab debug. Execute system integration and board bring-up, partnering with hardware, embedded software, systems, and verification engineers to deliver flight-ready capabilities for air dominance and strike platforms.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
  • •Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans.
  • •Own FPGA designs or major functional blocks through integration, timing closure, and lab debug.
  • •Develop and execute simulation, synthesis, and implementation flows, then debug functional, timing, and integration issues.
  • •Support board bring-up, lab validation, and system integration on target platforms in collaboration with hardware, embedded software, systems, and verification engineers.

Pay and Benefits

Salary: USD 166,000 - 220,000 annually
Equity and Bonus:Equity

Key Requirements

  • •Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
  • •8+ years of FPGA, ASIC, or closely related digital design experience.
  • •Proficiency in VHDL and/or Verilog/SystemVerilog.
  • •Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms.
  • •Eligible to obtain and maintain an active U.S. Secret security clearance.
Experience:8+ yearsEmbedded systemsAvionicsDefenseFPGAASIC
Education:Bachelor's
Skills:CommunicationCollaboration
Languages:English
Tech Stack:VHDLVerilogSystemVerilogRTLFPGASoCSimulationSynthesisTiming closureLinuxGitTclPythonAMD (Xilinx)Intel/AlteraLatticeVitisEthernetPCIeJESD204

Eligibility

Security Clearance:Secret

Company Brief

Anduril
Designs and builds advanced defense systems combining autonomous aircraft, sensors, and AI-driven software for military and national security applications, focused on modernizing battlefield capabilities and distributed sensing.
Industry: Defense Technology
Company Size: Enterprise (1,001+ employees)
Growth: Scaleup
Valuation: Unicorn (USD 1B+)
Funding: Series E+
Headquarters: Costa Mesa, United States
Founded: 2017
WebsiteLinkedIn