Principal Software Engineer
Cadence Design Systems
Noida
Workplace: OnsiteFull timeFunction: Software EngineeringEducation: mastersSkills: ["C","C++","Embedded C","Scripting","UVM","SoC verification","IP/VIP development","Design verification","Protocols","Communication"]Lead development of IP/VIP and subsystems for SoC verification, applying UVM and SW-driven (embedded C) approaches. Work on C/C++ and protocol-level verification while collaborating across teams to adopt design and verification methodologies in a fast-paced electronic design environment.

