Senior Electronics Design Engineer - FPGA & Digital Design (Open also to Protected Categories, Law 68/99)

Thales
Italy
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: mastersSkills: ["Documentation","Technical planning","Risk assessment"]

Provide deep FPGA and digital design expertise for identity and biometric solutions, strengthening the electronics domain’s design approach for document readers and biometric scanners. Define FPGA architecture and detailed specifications, develop and maintain RTL in VHDL/Verilog/SystemVerilog, and drive verification (testbenches, simulation, and formal where applicable). Perform synthesis and timing closure, integrate sensor and high-speed interfaces, and optimize performance, power, and FPGA resource utilization.

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FursaFursa
Thales
Thales
1 day ago

Senior Electronics Design Engineer - FPGA & Digital Design (Open also to Protected Categories, Law 68/99)

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Last checked: 3 hours agoStatus: Live

Job Summary

Provide deep FPGA and digital design expertise for identity and biometric solutions, strengthening the electronics domain’s design approach for document readers and biometric scanners. Define FPGA architecture and detailed specifications, develop and maintain RTL in VHDL/Verilog/SystemVerilog, and drive verification (testbenches, simulation, and formal where applicable). Perform synthesis and timing closure, integrate sensor and high-speed interfaces, and optimize performance, power, and FPGA resource utilization.
Location: Italy
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Define FPGA architecture and detailed design specifications from system requirements
  • •Design, implement, and maintain RTL in VHDL/Verilog/SystemVerilog
  • •Develop and execute verification strategy including verification plan, testbenches, simulation environments, and formal verification where applicable
  • •Perform synthesis, place-and-route, timing analysis, and timing closure
  • •Integrate and validate product interfaces and sensor data-path processing; support board bring-up, debugging, and system integration

Key Requirements

  • •8+ years of FPGA design and development across architecture through timing closure and hardware validation
  • •Strong RTL skills in VHDL, Verilog, and SystemVerilog, plus verification methodology
  • •Solid digital-design fundamentals including finite state machines, clock domain crossing, pipelining, synchronization, and memory architectures
  • •Experience with Altera FPGA development tools such as Quartus Prime and ModelSim/QuestaSim
  • •Hands-on experience integrating and validating board-level interfaces (e.g., PCIe, DDR, and sensor/image interfaces) and automating design flows with Python/Tcl/Bash
Experience:8+ yearsFPGAImage processingBiometricsIdentity managementHardware engineering
Education:Master's in Electronics, Electrical/Computer Engineering (or related discipline)
Skills:DocumentationTechnical planningRisk assessment
Tech Stack:FPGAVHDLVerilogSystemVerilogRTLVerificationTestbenchesFormal verificationQuartus PrimeModelSimQuestaSimPythonTclBashPCIeDDR3DDR4DDR5EthernetUART

Company Brief

Thales
Designs and delivers advanced systems and services for aerospace, defence, security, and digital identity and cybersecurity markets, serving government and commercial customers worldwide.
Industry: Defense Technology
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Paris, France
Founded: 2000
WebsiteLinkedIn