PCIe IP Verification Engineer
NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: Software EngineeringExperience: 2+ yearsEducation: bachelorsSkills: ["Verilog","SystemVerilog","UVM","Perl","Python","Debugging"]Senior verification engineer responsible for verifying ASIC design, architecture, and IP/sub-system level PCIE controllers using UVM. Collaborates with architects, designers and silicon verification teams to develop test plans, verification infrastructure, and reusable components (bus functions, monitors, scoreboards) to ensure correct PCIe/IP functionality for NVIDIA GPUs and SOCs.
