Lead IP Block level Verification Engineer

AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Communication","Problem-solving","Teamwork"]

Lead and contribute to verification of Network-on-Chip IPs and subsystems, architecting and developing simulation/formal verification environments, writing SystemVerilog/UVM testbenches, and driving coverage and validation to ensure functional correctness of NOC IPs and SOC designs. Collaborate with architects and design engineers across sites to deliver robust verification results.

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FursaFursa
AMD
AMD
5 months ago

Lead IP Block level Verification Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live

Job Summary

Lead and contribute to verification of Network-on-Chip IPs and subsystems, architecting and developing simulation/formal verification environments, writing SystemVerilog/UVM testbenches, and driving coverage and validation to ensure functional correctness of NOC IPs and SOC designs. Collaborate with architects and design engineers across sites to deliver robust verification results.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Lead and Plan verification of complex digital design blocks by fully understanding the architecture and design specifications
  • •Interact with architects and design engineers to create a comprehensive verification testplan
  • •Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner
  • •Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools
  • •Debug tests with design engineers to deliver functionally correct design blocks

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •Bachelor's or Master’s degree in computer engineering or Electrical Engineering with 8+ years of experience
  • •Strong experience with SystemVerilog/UVM testbenches and Verilog testbenches (including constrained-random and directed verification)
  • •Experience in verifying digital design blocks at block/subsystem level and creating verification test plans
  • •Excellent communication and collaboration skills across geographically distributed teams
  • •Familiarity with verification methodologies and tools; experience with coverage analysis and regression management is a plus
Experience:8+ yearsSemiconductorDigital designVerificationNOC
Education:Bachelor's
Skills:CommunicationProblem-solvingTeamwork
Languages:English
Tech Stack:SystemVerilogUVMVerilogSVASystemVerilog AssertionsVerif toolsCadence IESSynopsys VCSUTM

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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