Design Verification Engineer - Interface IP

Etched
San Jose
Workplace: OnsiteFull timeUSD 150,000 - 275,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsSkills: ["Communication","Collaboration","Problem-solving","Teamwork","Adaptability"]

Design Verification Engineer for the Interface IP DV team, collaborating with architects, designers, and vendors to verify IP subsystems and interfaces across the full hardware-software stack. Own verification for PCIe, Ethernet, and CPU interfaces, develop scalable UVM testbenches, and drive coverage to sign-off in a fast-paced ASIC startup in San Jose.

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FursaFursa
Etched
Etched
11 months ago

Design Verification Engineer - Interface IP

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Design Verification Engineer for the Interface IP DV team, collaborating with architects, designers, and vendors to verify IP subsystems and interfaces across the full hardware-software stack. Own verification for PCIe, Ethernet, and CPU interfaces, develop scalable UVM testbenches, and drive coverage to sign-off in a fast-paced ASIC startup in San Jose.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •End-to-end ownership of one or more IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors.
  • •Understand vendor IP configurations and handle handshake with internal IP team.
  • •Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and IP spec compliance.
  • •Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.
  • •Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring verification across corner cases and stress scenarios.

Pay and Benefits

Salary: USD 150,000 - 275,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceHousing SubsidyRelocationWellness StipendMeal Allowance

Key Requirements

  • •5+ years of design verification experience.
  • •Enjoy digging into complex verification challenges and exposing corner-case bugs.
  • •Hands-on experience with SystemVerilog/UVM and building scalable, reusable testbenches.
  • •Comfortable with interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
  • •Thrives in a fast-paced startup environment and can take ownership with minimal direction, collaborating across RTL, software and emulation.
Experience:5+ yearsSemiconductorsASICHardware design
Skills:CommunicationCollaborationProblem-solvingTeamworkAdaptability
Tech Stack:SystemVerilogUVMPCIeEthernetAXI/AMBAARMARCTestbenches

Company Brief

Etched
Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Early Stage Startup
Valuation: Unicorn (USD 1B+)
Funding: Series A
Headquarters: San Jose, United States
Founded: 2022
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