Lead Principal Engineer, Layout Design

Micron Technology
Mexico
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: bachelorsSkills: ["Problem-solving","Debugging","Prioritization","Self-motivation","Communication"]

Lead the physical implementation of modern DRAM and mixed-signal circuits, translating device and circuit specifications into manufacturable custom layouts. Build hierarchical layouts and floorplans for analog, digital, and memory-array circuitry using industry-standard EDA tools, optimizing for PPA, reliability, and signal integrity. Own physical verification and tapeout signoff, including parasitic extraction and closure, while coordinating implementation status, ECO execution, and integration across multiple blocks.

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Micron Technology
Micron Technology
3 months ago

Lead Principal Engineer, Layout Design

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Last checked: 6 hours agoStatus: Live

Job Summary

Lead the physical implementation of modern DRAM and mixed-signal circuits, translating device and circuit specifications into manufacturable custom layouts. Build hierarchical layouts and floorplans for analog, digital, and memory-array circuitry using industry-standard EDA tools, optimizing for PPA, reliability, and signal integrity. Own physical verification and tapeout signoff, including parasitic extraction and closure, while coordinating implementation status, ECO execution, and integration across multiple blocks.
Location: Mexico
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Lead layout build and physical realization of new memory products.
  • •Interpret device and circuit specifications and implement custom layout solutions meeting PPA (power, performance, area) and reliability targets.
  • •Develop hierarchical layouts and optimize block/top-level floorplans for placement, routing, signal integrity, power delivery, and manufacturability.
  • •Run and debug physical verification flows, perform parasitic extraction, and resolve issues impacting timing, power, noise, and functionality.
  • •Manage resource planning, priorities, tapeout schedules, track closure, coordinate ECO execution, and communicate implementation status for integration.

Key Requirements

  • •10+ years of experience in the Semiconductor industry.
  • •Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).
  • •Strong understanding of CMOS devices and layout-dependent effects, including reliability checks and layout constraints.
  • •Hands-on experience with custom IC layout and physical verification tools, including tapeout delivery.
  • •Proficiency in scripting/automation to improve layout efficiency.
Experience:10+ yearsSemiconductorMemory
Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field
Skills:Problem-solvingDebuggingPrioritizationSelf-motivationCommunication
Tech Stack:EDA toolsParasitic extractionPhysical verificationScripting/automationFloorplanning

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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