Intel

2 weeks ago

Senior Standard Cell and IP Application Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 13 hours agoStatus: Live

Job Summary

Own customer-facing release delivery for foundational IP, including packaging, validation, and release of standard cell and PDK collateral through Intel Foundry portals and PLM systems. Drive end-to-end QA monitoring and release execution for assigned IP families while partnering with FIP development teams to resolve quality and integration issues. Serve as the primary technical interface to customers, develop release documentation and collateral, and improve release tooling and support workflows.

Location: Bengaluru

Workplace: Hybrid

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Package, validate, and release high-volume foundational IP collateral (standard cell libraries, PDK content, GPIOs, PLLs) to IP delivery portals and PLM systems, meeting customer dates and quality targets.
•Drive end-to-end release execution for assigned IP families, including QA monitoring, packaging throughput, and adherence to Intel IP governance and certification requirements.
•Provide primary technical point of contact for customer technical analysis, debug, and integration support; coordinate with FIP development teams to resolve quality and integration issues.
•Coordinate with Technical Program Managers and customer engineering leads on release communication, customer-facing documentation, and release notes.
•Review IP performance and quality, contribute to QA flow and verification methodology improvements, develop customer-facing collateral, and mentor junior engineers.

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of relevant industry experience, or a Master's degree with 3+ years.
•Demonstrated experience with IP quality assessment and IP release processes, plus technical customer support using industry-standard methods.
•Technical background in IC design, verification, QA, and IP release for advanced process nodes.
•Hands-on experience with standard cell libraries and analog/mixed-signal IPs (PLLs, GPIOs), including library characterization and QA flows.
•Familiarity with foundry PDK release flows and IP lifecycle management systems such as Teamcenter and Carbon.

Experience:3+ yearsSemiconductorsFoundryIP releaseIC design

Education:Bachelor's

Skills:Technical judgmentIndependent executionStakeholder collaborationDebuggingMentoring

Tech Stack:SynopsysCadenceIPXUCMTeamcenterFLPRCarbonJiraJSMPDKPLMSDLCSDL

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

2 weeks ago

Senior Standard Cell and IP Application Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 13 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Hybrid

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Package, validate, and release high-volume foundational IP collateral (standard cell libraries, PDK content, GPIOs, PLLs) to IP delivery portals and PLM systems, meeting customer dates and quality targets.
•Drive end-to-end release execution for assigned IP families, including QA monitoring, packaging throughput, and adherence to Intel IP governance and certification requirements.
•Provide primary technical point of contact for customer technical analysis, debug, and integration support; coordinate with FIP development teams to resolve quality and integration issues.
•Coordinate with Technical Program Managers and customer engineering leads on release communication, customer-facing documentation, and release notes.
•Review IP performance and quality, contribute to QA flow and verification methodology improvements, develop customer-facing collateral, and mentor junior engineers.

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of relevant industry experience, or a Master's degree with 3+ years.
•Demonstrated experience with IP quality assessment and IP release processes, plus technical customer support using industry-standard methods.
•Technical background in IC design, verification, QA, and IP release for advanced process nodes.
•Hands-on experience with standard cell libraries and analog/mixed-signal IPs (PLLs, GPIOs), including library characterization and QA flows.
•Familiarity with foundry PDK release flows and IP lifecycle management systems such as Teamcenter and Carbon.

Experience:3+ yearsSemiconductorsFoundryIP releaseIC design

Education:Bachelor's

Skills:Technical judgmentIndependent executionStakeholder collaborationDebuggingMentoring

Tech Stack:SynopsysCadenceIPXUCMTeamcenterFLPRCarbonJiraJSMPDKPLMSDLCSDL

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor