Etched

3 months ago

Systems Validation Engineer, L10

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Lead end-to-end system validation for a high-performance AI accelerator platform, owning bring-up, debug, and production-readiness across hardware, firmware, and software. Build instrumentation, define coverage models, and drive cross-functional issue resolution to ensure zero escapes to production on multi-component systems in a fast-paced, in-person team in San Jose.

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Seniority: Manager level

Key Responsibilities

•Author and own the L10 system debug guide, serving as the definitive reference for factory failure analysis and debug teams.
•Own end-to-end escalation, debug, and resolution of L10 hardware failures across internal and field teams
•Develop and own L10 system debug guide to be used for the factory by the failure analysis / debug team.
•Own bring-up and integration across accelerator cards, interconnects (Retimers, C2C fabric), power (PSU, power integrity), and thermal domains.
•Lead system-level debug with no guaranteed starting point: hardware, firmware (BMC, BIOS, CPLD), and software all in scope simultaneously.

Travel: Low travel

Pay and Benefits

Perks:Health InsuranceDentalVisionRelocationHousing SubsidyMeal AllowanceWellness Stipend

Key Requirements

•10+ years in system validation or platform bring-up with direct, solo ownership of full L10 integration on multi-component platforms.
•Hands-on signal integrity and power integrity debugging (SerDes, PCIe Gen5/6, Ethernet, HBM signaling).
•Ability to build a coverage model that delivers quantitative platform readiness metrics.
•Strong Linux and Python/Bash scripting; capable of building tools to instrument and extract data from non-debuggable systems.
•Occasional travel overseas to contract manufacturers.

Experience:10+ yearsAI hardwareSemiconductorsHigh-performance computeInference

Skills:Problem-solvingCommunicationTeamworkLeadershipAttention to detail

Tech Stack:LinuxPythonBashPCIeHBMNVMeBMCBIOSCPLDSerDes

Company Brief

Etched

Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.

Industry: Hardware Devices

Company Size: Medium (51 to 250 employees)

Growth: Early Stage Startup

Valuation: Unicorn (USD 1B+)

Funding: Series A

Headquarters: San Jose, United States

Founded: 2022

Website LinkedIn Glassdoor

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Etched

3 months ago

Systems Validation Engineer, L10

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Seniority: Manager level

Key Responsibilities

•Author and own the L10 system debug guide, serving as the definitive reference for factory failure analysis and debug teams.
•Own end-to-end escalation, debug, and resolution of L10 hardware failures across internal and field teams
•Develop and own L10 system debug guide to be used for the factory by the failure analysis / debug team.
•Own bring-up and integration across accelerator cards, interconnects (Retimers, C2C fabric), power (PSU, power integrity), and thermal domains.
•Lead system-level debug with no guaranteed starting point: hardware, firmware (BMC, BIOS, CPLD), and software all in scope simultaneously.

Travel: Low travel

Pay and Benefits

Perks:Health InsuranceDentalVisionRelocationHousing SubsidyMeal AllowanceWellness Stipend

Key Requirements

•10+ years in system validation or platform bring-up with direct, solo ownership of full L10 integration on multi-component platforms.
•Hands-on signal integrity and power integrity debugging (SerDes, PCIe Gen5/6, Ethernet, HBM signaling).
•Ability to build a coverage model that delivers quantitative platform readiness metrics.
•Strong Linux and Python/Bash scripting; capable of building tools to instrument and extract data from non-debuggable systems.
•Occasional travel overseas to contract manufacturers.

Experience:10+ yearsAI hardwareSemiconductorsHigh-performance computeInference

Skills:Problem-solvingCommunicationTeamworkLeadershipAttention to detail

Tech Stack:LinuxPythonBashPCIeHBMNVMeBMCBIOSCPLDSerDes

Company Brief

Etched

Industry: Hardware Devices

Company Size: Medium (51 to 250 employees)

Growth: Early Stage Startup

Valuation: Unicorn (USD 1B+)

Funding: Series A

Headquarters: San Jose, United States

Founded: 2022

Website LinkedIn Glassdoor