IC Design Engineer

Broadcom
India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Skills: ["Analytical skills","Collaboration","Automation mindset"]

Lead Broadcom’s physical design activities to deliver right-first-time silicon, using top-down/bottom-up SoC integration for 5nm and below. Own key P&R flow stages including floorplanning, partitioning, placement, CTS, routing, physical verification, and support STA closure. Implement timing and functional ECO, enhance or adapt automation flows for reuse, and drive improvements in TAT while maintaining quality. Proficiency with Cadence, Synopsys, or Mentor EDA tools and scripting is required.

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FursaFursa
Broadcom
Broadcom
1 month ago

IC Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 10 days agoStatus: Live

Job Summary

Lead Broadcom’s physical design activities to deliver right-first-time silicon, using top-down/bottom-up SoC integration for 5nm and below. Own key P&R flow stages including floorplanning, partitioning, placement, CTS, routing, physical verification, and support STA closure. Implement timing and functional ECO, enhance or adapt automation flows for reuse, and drive improvements in TAT while maintaining quality. Proficiency with Cadence, Synopsys, or Mentor EDA tools and scripting is required.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Apply and lead Broadcom’s physical design methodology and milestone flow to achieve right-first-time silicon.
  • •Perform layout activities for blocks and levels, including floor-planning, partitioning, placement, CTS, routing, and physical verification.
  • •Implement timing and functional ECO and work toward STA closure.
  • •Understand SoC physical design integration using top-down/bottom-up approaches for 5nm and lower technologies.
  • •Build, adapt, and reuse automation flows; improve TAT with better quality and lead by example.

Key Requirements

  • •MSEE/MSCS with 3+ years experience (or BSEE/BSCS with 5+ years) in backend digital design flow.
  • •Deep functional knowledge of P&R flows across floorplanning/partitioning/placement/CTS/route stages for SoC top-level.
  • •Proficient with timing constraints and physical constraints, supporting STA closure.
  • •Proficiency with backend EDA tools including Genus/Innovus/Quantus/Tempus and/or DC/Star-RCXT/PT plus PrimeRail/Voltus and Redhawk.
  • •Programming proficiency in Tcl and Perl, with excellent analytical and cross-site collaboration skills.
Skills:Analytical skillsCollaborationAutomation mindset
Tech Stack:CadenceSynopsysMentorGenusInnovusQuantusTempusDCStar-RCXTPTPrimeRailVoltusRedhawkTclPerlP&RSTAECOSoCFloorplanning

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn