Systems Software Engineer, NPU Management Interface

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Software EngineeringSkills: ["Spec-driven implementation","Debugging","Protocol compliance","Interoperability testing"]

Design and develop the NPU Management Interface (MI) firmware/software to enable out-of-band communication between Host/BMC and NPU devices. Implement MCTP and PLDM command handling, build device-management features over low-level buses (SMBus/I²C, I3C, PCIe VDM/custom sideband), integrate telemetry and diagnostics, and ensure spec-driven compliance. Lead validation through interoperability, regression, and protocol compliance testing with system-level bring-up and debugging.

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FursaFursa
FuriosaAI
FuriosaAI
2 weeks ago

Systems Software Engineer, NPU Management Interface

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 46 minutes agoStatus: Live

Job Summary

Design and develop the NPU Management Interface (MI) firmware/software to enable out-of-band communication between Host/BMC and NPU devices. Implement MCTP and PLDM command handling, build device-management features over low-level buses (SMBus/I²C, I3C, PCIe VDM/custom sideband), integrate telemetry and diagnostics, and ensure spec-driven compliance. Lead validation through interoperability, regression, and protocol compliance testing with system-level bring-up and debugging.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering

Key Responsibilities

  • •Design and develop the NPU Management Interface (MI) firmware/software for communication between Host/BMC and NPU devices
  • •Implement and maintain MCTP, PLDM, and custom MI command handling for out-of-band monitoring and control
  • •Develop device-management features over SMBus/I²C, I3C, PCIe VDM, or custom sideband channels
  • •Integrate MI functionality into NPU firmware, including health/error reporting, telemetry, runtime status/utilization, and debug information
  • •Perform spec-driven design, implementation, and validation, including interoperability testing, rack-scale integration, and protocol compliance/regression verification

Key Requirements

  • •Strong proficiency in embedded C or C++
  • •Experience developing firmware for NPU/accelerators, GPU, or SoC platforms
  • •Understanding of management protocols including MCTP and PLDM
  • •Hands-on experience with low-level interfaces such as SMBus/I²C, I3C, SPI, and PCIe
  • •Ability to interpret complex protocol specifications and implement robust solutions
Experience:Embedded systemsFirmware developmentDatacenter integrationHPC
Skills:Spec-driven implementationDebuggingProtocol complianceInteroperability testing
Languages:English
Tech Stack:CC++Embedded systemsNPU management interfaceMCTPPLDMSMBusI2CI3CSPIPCIePCIe VDMBMC firmwareOpenBMCRedfishIPMISMBus/I²CLogic analyzersRTOSWatchdog

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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