ASIC Verification Engineer - Clocks

NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 2+ yearsEducation: bachelorsSkills: ["Collaboration","Scalability","Problem-solving","Innovation"]

Own end-to-end verification of clocking and reset structures for Tegra automotive and datacenter SOC ASICs, from test plan creation and automation to coverage metrics, execution, bug identification/fixes, and productization. Build scalable verification solutions that support complex specifications across platforms. Work hands-on with SystemVerilog/UVM and industry verification methodologies, coding test and validation flows in SystemVerilog, C++, Perl, and Python while partnering with clocks/reset architecture and collaborating across teams.

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FursaFursa
NVIDIA
NVIDIA
1 week ago

ASIC Verification Engineer - Clocks

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live
Reposted: similar role first listed 5 months ago

Job Summary

Own end-to-end verification of clocking and reset structures for Tegra automotive and datacenter SOC ASICs, from test plan creation and automation to coverage metrics, execution, bug identification/fixes, and productization. Build scalable verification solutions that support complex specifications across platforms. Work hands-on with SystemVerilog/UVM and industry verification methodologies, coding test and validation flows in SystemVerilog, C++, Perl, and Python while partnering with clocks/reset architecture and collaborating across teams.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Own validation of clocking structures from start to finish, including test plan development, automation, validation flow development, coverage metrics, test execution, and bug identification/fix.
  • •Develop scalable verification solutions that work across platforms.
  • •Use modern verification methodologies and industry-standard tools to ensure quality across complex clock/reset specifications.
  • •Code verification and support infrastructure using SystemVerilog, UVM, C++, Perl, Python, and NVIDIA custom compilers/tools.
  • •Partner with clock/reset architecture and design teams, and coordinate with internal and external teams across time zones.

Key Requirements

  • •BS or MS in EE/ECE or equivalent experience.
  • •2+ years of relevant industry work experience in ASIC design verification.
  • •Strong understanding of logic design and architecture.
  • •Expertise in verification flows such as SV constrained-random, UVM, formal verification, and coverage metrics (including profiling tools and X-prop).
  • •Strong coding skills in SystemVerilog plus scripting (Perl/Python) and C++.
Experience:2+ years
Education:Bachelor's in EE/ECE
Skills:CollaborationScalabilityProblem-solvingInnovation
Tech Stack:System VerilogUVMC++PerlPythonTegraFormal verificationSV constrained-randomCoverage metricsX prop

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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