NVIDIA

1 month ago

Senior Power Integrity Engineer - LPU Packaging

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Senior Power Integrity Engineer to own PI specifications and PDN design for GPU/HBM and high-speed SerDes, architect package-level PDNs for FCBGA/25D/3D, and drive system-level PI across die to rack levels. This role collaborates with design, SI, thermal, and mechanical teams, develops PI models, and validates impedance, noise, and droop through lab and simulation work in advanced packaging.

Location: Taiwan

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Seniority: Sr. Manager level

Key Responsibilities

•Define best-in-class power delivery design and optimization practices from die to rack for full product development cycles.
•Own the PI specification and methodology, defining PDN targets including impedance, droop, noise, and transient response for GPU, HBM, and high-speed SerDes.
•Architect package-level PDNs by collaborating with design teams on bump/ball maps, via structures, and decoupling strategies for FCBGA and 25D/3D integrations.
•Drive system-level PI design, including board-level PDN planning, decap placement, and VRM interfaces while co-optimizing with SI, thermal, and mechanical teams.
•Perform PI extraction and simulation for advanced packages and develop integrated chip–package–board co-simulation flows using industry-standard tools.

Key Requirements

•MS or PhD in Electrical Engineering or a related field, or equivalent experience
•10+ years of relevant work experience in Power Integrity
•Strong background in power integrity for high-current, low-voltage rails within GPUs/ASICs/CPUs
•Proven ownership of chip-package-board PDN design and sign-off process
•Hands-on experience with FCBGA, 25D/3D integration, HBM, or similar high-power, high-pin-count packages

Experience:10+ yearsGPUASICCPUPower integrityPDNHBM

Education:Master's

Skills:LeadershipCollaborationCommunicationProblem-solvingTeamwork

Tech Stack:PowerSIPowerDCSigrityRedHawkTotemHFSSSIwaveADSSPICE

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

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NVIDIA

1 month ago

Senior Power Integrity Engineer - LPU Packaging

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Location: Taiwan

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Seniority: Sr. Manager level

Key Responsibilities

•Define best-in-class power delivery design and optimization practices from die to rack for full product development cycles.
•Own the PI specification and methodology, defining PDN targets including impedance, droop, noise, and transient response for GPU, HBM, and high-speed SerDes.
•Architect package-level PDNs by collaborating with design teams on bump/ball maps, via structures, and decoupling strategies for FCBGA and 25D/3D integrations.
•Drive system-level PI design, including board-level PDN planning, decap placement, and VRM interfaces while co-optimizing with SI, thermal, and mechanical teams.
•Perform PI extraction and simulation for advanced packages and develop integrated chip–package–board co-simulation flows using industry-standard tools.

Key Requirements

•MS or PhD in Electrical Engineering or a related field, or equivalent experience
•10+ years of relevant work experience in Power Integrity
•Strong background in power integrity for high-current, low-voltage rails within GPUs/ASICs/CPUs
•Proven ownership of chip-package-board PDN design and sign-off process
•Hands-on experience with FCBGA, 25D/3D integration, HBM, or similar high-power, high-pin-count packages

Experience:10+ yearsGPUASICCPUPower integrityPDNHBM

Education:Master's

Skills:LeadershipCollaborationCommunicationProblem-solvingTeamwork

Tech Stack:PowerSIPowerDCSigrityRedHawkTotemHFSSSIwaveADSSPICE

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor