Cadence Design Systems

4 months ago

Application Engineer, RTL2GDS Sr Director

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Senior technical leader in Cadence’s North America Field Applications Team, guiding strategic customer engagements and influencing next-generation EDA and Agentic-AI solutions. Leads a team to deliver advanced design solutions for leading semiconductor companies, collaborating with R&D and Product Engineering, and representing Cadence at industry forums.

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Define and execute technical engagement strategies for top semiconductor design teams, ensuring alignment with corporate objectives and customer success metrics.
•Act as a trusted advisor for executive-level stakeholders, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes (3nm and below).
•Lead and mentor a high-performing team of Application Engineers, fostering technical excellence and career growth.
•Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
•Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.

Pay and Benefits

Salary: USD 187,600 - 348,400 annually

Equity and Bonus:Equity

Perks:401kEquityMedicalDentalVisionPaid Leave

Key Requirements

•20+ years of experience in IC design implementation and signoff
•BS/MS in Electrical Engineering, Computer Engineering, or related field
•Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems
•Proven track record of leading technical teams and driving customer success at executive levels
•Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure

Experience:20+ yearsSemiconductorEDA

Education:Bachelor's

Skills:LeadershipCommunicationNegotiationInfluencingMentorship

Tech Stack:TclPythonPerlGenusInnovusTempusVoltusConformalCerebrus

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

4 months ago

Application Engineer, RTL2GDS Sr Director

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Define and execute technical engagement strategies for top semiconductor design teams, ensuring alignment with corporate objectives and customer success metrics.
•Act as a trusted advisor for executive-level stakeholders, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes (3nm and below).
•Lead and mentor a high-performing team of Application Engineers, fostering technical excellence and career growth.
•Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
•Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.

Pay and Benefits

Salary: USD 187,600 - 348,400 annually

Equity and Bonus:Equity

Perks:401kEquityMedicalDentalVisionPaid Leave

Key Requirements

•20+ years of experience in IC design implementation and signoff
•BS/MS in Electrical Engineering, Computer Engineering, or related field
•Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems
•Proven track record of leading technical teams and driving customer success at executive levels
•Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure

Experience:20+ yearsSemiconductorEDA

Education:Bachelor's

Skills:LeadershipCommunicationNegotiationInfluencingMentorship

Tech Stack:TclPythonPerlGenusInnovusTempusVoltusConformalCerebrus

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor