Senior Package Layout Engineer - Hardware

NVIDIA
Santa Clara, California, Nevada, Arizona, Oregon, Washington
Workplace: HybridFull timeUSD 136,000 - 258,750 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Collaboration","Schedule planning","Cost resolution","Problem-solving","Autonomy"]

Design and develop sophisticated IC substrate layouts for NVIDIA products, collaborating with a Technical Package Lead and multiple design teams. You’ll implement high-speed, high-density ASIC package layouts, create substrate breakout patterns, optimize pinouts, and handle routing, placement, stack-up, reference planes, and power distribution using Cadence APD/SiP tools. You’ll also run feasibility studies and propose layout trade-offs for size, cost, and system performance.

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FursaFursa
NVIDIA
NVIDIA
2 days ago

Senior Package Layout Engineer - Hardware

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Last checked: 23 hours agoStatus: Live

Job Summary

Design and develop sophisticated IC substrate layouts for NVIDIA products, collaborating with a Technical Package Lead and multiple design teams. You’ll implement high-speed, high-density ASIC package layouts, create substrate breakout patterns, optimize pinouts, and handle routing, placement, stack-up, reference planes, and power distribution using Cadence APD/SiP tools. You’ll also run feasibility studies and propose layout trade-offs for size, cost, and system performance.
Location: Santa Clara, California, Nevada, Arizona, Oregon, Washington
Workplace: Hybrid
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Collaborate with a Technical Package Lead and design teams to design and develop detailed IC substrate layouts for NVIDIA products.
  • •Implement high-speed, high-density ASIC package layouts, including substrate breakout patterns and optimized pinouts based on system trade-offs.
  • •Perform package routing, placement, stack-up, reference plane, and power distribution using Cadence APD/SiP tool suites.
  • •Propose and validate layout design trade-offs and conduct feasibility studies for size, cost, and system performance.
  • •Develop symbols and CAD library databases and create methodologies to improve layout productivity.

Pay and Benefits

Salary: USD 136,000 - 258,750 annually
Equity and Bonus:Equity

Key Requirements

  • •Hold a B.S. in Electrical Engineering or equivalent experience.
  • •5+ years of experience in PCB layout for graphics cards, motherboards, line cards, or related technology (HDI is a plus).
  • •Proven experience in substrate layout for wire bond and flip chip packages.
  • •Significant experience with Cadence APD or SiP (and/or PCB layout tools), including Constraint Manager.
  • •Solid understanding of high-speed signal integrity practices.
Experience:5+ yearsPCB layoutASIC packagesHigh-speed design
Education:Bachelor's in Electrical Engineering
Skills:CollaborationSchedule planningCost resolutionProblem-solvingAutonomy
Tech Stack:Cadence APDSiPConstraint ManagerCadence APD design toolsVirtuosoCalibreValorHDIPCB layout toolsWire bondFlip chipASIC packagesIC substratesReference planePower distribution

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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