HSIO Validation Lead – Silicon Co-Design
Santa Clara
Workplace: HybridFull timeUSD 168,000 - 310,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Debugging","Root cause analysis","Validation methodology","Statistical proficiency","Judgment"]Own post-silicon bring-up, characterization, validation, and deep debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs. Define validation strategy (test coverage, margining, stress criteria), drive root-cause across protocol, signal integrity, firmware, drivers, and platform topology, and confirm fixes. Build AI-agent-assisted debug/triage flows and improve future coverage based on lessons learned from real silicon.

