Senior Engineer - Verification Enablement, Test Structure Design and Layout

Micron Technology
Mexico
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5-8 yearsEducation: mastersSkills: ["Cross-functional collaboration","Quality improvement","Process collaboration","Engineering enablement"]

Enable verification for scribe test structure build, layout, and reticle development to support advanced memory and mixed-signal process technologies. Develop and validate circuit layout and verification flows, using modeling, simulation, parasitic extraction, and post-layout checks with industry EDA tools. Build automation to improve efficiency, quality, and standardization, and collaborate with cross-functional engineering teams to accelerate technology development and manufacturing integration.

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FursaFursa
Micron Technology
Micron Technology
4 weeks ago

Senior Engineer - Verification Enablement, Test Structure Design and Layout

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Enable verification for scribe test structure build, layout, and reticle development to support advanced memory and mixed-signal process technologies. Develop and validate circuit layout and verification flows, using modeling, simulation, parasitic extraction, and post-layout checks with industry EDA tools. Build automation to improve efficiency, quality, and standardization, and collaborate with cross-functional engineering teams to accelerate technology development and manufacturing integration.
Location: Mexico
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Enable and support verification flows for scribe test structure build, layout, and reticle development.
  • •Contribute to the development, layout, optimization, and validation of memory, logic, analog, and mixed-signal circuits.
  • •Perform modeling, simulation, parasitic extraction, and post-layout verification using industry-standard EDA tools.
  • •Develop and maintain automation solutions to improve building efficiency, quality, and standardization.
  • •Collaborate with diverse engineering teams to support process development, manufacturability, and upcoming memory technology advancements.

Key Requirements

  • •Master’s degree or higher in Electrical Engineering, Electronics Engineering, or a related field.
  • •5–8 years of experience in IC build flow development, memory design, mixed-signal design, or layout engineering.
  • •Strong understanding of front-end and back-end analog/mixed-signal build flows, methodologies, and verification techniques.
  • •Practical experience with SPICE simulators (HSPICE, FineSim), schematic entry, netlist extraction, and post-layout verification.
  • •Experience developing automation solutions using SKILL, Python, Perl, Bash, or C-Shell scripting.
Experience:5-8 yearsIC build flowMemory designMixed-signal designLayout engineering
Education:Master's in Electrical Engineering, Electronics Engineering, or a related field
Skills:Cross-functional collaborationQuality improvementProcess collaborationEngineering enablement
Tech Stack:SPICEHSPICEFineSimSKILLPythonPerlBashC-ShellEDA toolsCAD automationLVSDRCPEXCalibreSVRFTVFConfluenceSharePointMicrosoft Power BIPower BI

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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