ASIC Engineer

Cisco
San Jose
Workplace: OnsiteFull timeUSD 155,000 - 222,600 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Debugging","Collaboration","Documentation"]

Develop and enhance DFT CAD infrastructure and automation for ASIC design flows, including scan insertion, ATPG, SPF generation, and pattern simulation. Build regression frameworks and dashboards, improve flow robustness, runtime, and scalability, and support large-scale regressions on compute farms using LSF or similar schedulers. Debug DFT flow failures and collaborate across DFT Design, ATPG, Verification, Physical Design, and CAD teams to support tool qualification and regression signoff.

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FursaFursa
Cisco
Cisco
1 day ago

ASIC Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live
Reposted: similar role first listed 6 months ago

Job Summary

Develop and enhance DFT CAD infrastructure and automation for ASIC design flows, including scan insertion, ATPG, SPF generation, and pattern simulation. Build regression frameworks and dashboards, improve flow robustness, runtime, and scalability, and support large-scale regressions on compute farms using LSF or similar schedulers. Debug DFT flow failures and collaborate across DFT Design, ATPG, Verification, Physical Design, and CAD teams to support tool qualification and regression signoff.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop, maintain, and enhance DFT CAD infrastructure, automation, and DFT implementation flows including scan insertion, ATPG generation, SPF generation, and pattern simulation.
  • •Develop utilities and automation using Python, Perl, Tcl, and shell scripting.
  • •Debug DFT flow failures and work with design teams to resolve issues.
  • •Create and maintain regression frameworks and dashboards, improving flow robustness, runtime, and scalability.
  • •Support large-scale regressions on compute farms using LSF or equivalent schedulers and assist with releases, tool qualification, and regression signoff.

Pay and Benefits

Salary: USD 155,000 - 222,600 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kPaid ParentalPaid HolidaysPaid Leave

Key Requirements

  • •Bachelor’s degree in Electrical or Computer engineering and 5+ years of ASIC Design experience, or a Master’s degree with 3+ years, or a PhD with 0+ years.
  • •Experience with Verilog/SystemVerilog programming.
  • •Experience with interactive and waveform debugging.
  • •Experience with industry-standard DFT/EDA tools and working with design, verification, and test teams to resolve flow and methodology issues.
  • •Scripting experience in Python, Perl, TCL, or shell programming.
Experience:5+ years
Education:Bachelor's in Electrical or Computer engineering
Skills:DebuggingCollaborationDocumentation
Tech Stack:DFTCADAutomationScan insertionATPGSPF generationPattern simulationPythonPerlTclShell scriptingInteractive debuggingWaveform debuggingDFT/EDA toolsLSFSDCSynopsys Design Constraints

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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