Pre-si Verification Engineer

Develop and execute pre-silicon verification for next-generation Client SoCs, ensuring functional correctness and quality before tape-out. Build SystemVerilog/UVM testbenches and verification environments, create constrained-random and directed test scenarios, and run simulation/emulation to validate functionality, power, and performance. Lead debug and root-cause analysis for RTL and testbench failures, drive coverage closure, collaborate across design/validation teams, and improve verification methodology and automation using AI.