Intel

4 weeks ago

Verification Engineer Senior

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Join Intel's ASIC design verification team and lead scalable verification plans for blocks, subsystems and SoCs. Drive UVM/Formal verification, mentor junior engineers, collaborate with RTL, architecture and post-silicon teams, and continuously improve verification methodologies to deliver high-coverage, robust pre-silicon validation for next‑gen ASICs.

Location: Austin

Workplace: Hybrid

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Sr. Manager level

Key Responsibilities

•Define Project Specific Verification Strategy: Define and implement scalable and reusable verification plans, test benches, and environments for blocks, subsystems, and SoCs, ensuring target coverage and alignment with microarchitecture specs
•Lead Verification Execution: Create detailed test plans and drive technical reviews with design and architecture teams to validate these plans and proofs
•Execute verification plans: Implement and run block/subsystem/cluster/SoC simulation models to verify design, analyze power and performance, and identify bugs
•Investigate and Resolve Bugs: Replicate root causes and debug issues in pre-silicon, applying corrective measures to resolve failing tests
•Collaborate Across Teams: Work with SoC architects, RTL developers, post-silicon and physical design teams to improve verification of complex features

Pay and Benefits

Salary: USD 190,610 - 269,100 annually

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 8+ years of experience in ASIC/FPGA design verification, or a Master’s degree with 6+ years of experience in ASIC/FPGA design verification
•Object-oriented programming (OOP) principles and their application in SystemVerilog UVM or other verification methodologies
•Developing UVM and/or Formal based verification architectures and methodologies
•Experience with industry standard protocols (AMBA AXI/AXI-S/CHI) and low-speed protocols (UART, SPI, I2C/I3C)
•Familiarity with coverage-driven verification, constrained-random testing and strong debugging skills

Experience:8+ yearsSemiconductorASICFPGAEDA

Education:Bachelor's

Skills:SystemVerilogUVMFormalAMBA AXIUARTSPII2CI3CCoverage-driven verificationConstrained-random testingDebuggingScripting

Tech Stack:SystemVerilogUVMFormalAMBA AXIUARTSPII2CI3CVCSXceliumScripting

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

4 weeks ago

Verification Engineer Senior

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Location: Austin

Workplace: Hybrid

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Sr. Manager level

Key Responsibilities

•Define Project Specific Verification Strategy: Define and implement scalable and reusable verification plans, test benches, and environments for blocks, subsystems, and SoCs, ensuring target coverage and alignment with microarchitecture specs
•Lead Verification Execution: Create detailed test plans and drive technical reviews with design and architecture teams to validate these plans and proofs
•Execute verification plans: Implement and run block/subsystem/cluster/SoC simulation models to verify design, analyze power and performance, and identify bugs
•Investigate and Resolve Bugs: Replicate root causes and debug issues in pre-silicon, applying corrective measures to resolve failing tests
•Collaborate Across Teams: Work with SoC architects, RTL developers, post-silicon and physical design teams to improve verification of complex features

Pay and Benefits

Salary: USD 190,610 - 269,100 annually

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 8+ years of experience in ASIC/FPGA design verification, or a Master’s degree with 6+ years of experience in ASIC/FPGA design verification
•Object-oriented programming (OOP) principles and their application in SystemVerilog UVM or other verification methodologies
•Developing UVM and/or Formal based verification architectures and methodologies
•Experience with industry standard protocols (AMBA AXI/AXI-S/CHI) and low-speed protocols (UART, SPI, I2C/I3C)
•Familiarity with coverage-driven verification, constrained-random testing and strong debugging skills

Experience:8+ yearsSemiconductorASICFPGAEDA

Education:Bachelor's

Skills:SystemVerilogUVMFormalAMBA AXIUARTSPII2CI3CCoverage-driven verificationConstrained-random testingDebuggingScripting

Tech Stack:SystemVerilogUVMFormalAMBA AXIUARTSPII2CI3CVCSXceliumScripting

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor