Product Development Engineer

AMD
Taiwan
Workplace: HybridFull timeFunction: Communications, PR & CommunityEducation: bachelorsSkills: ["Communication","Collaboration","Problem-solving"]

The Member Technical Staff, Process Technology Integration, will partner with foundry teams to drive yield, performance, and reliability for AMD’s high-volume CPU/GPU/APU manufacturing. You’ll evaluate and implement process improvements across FEOL loops, collaborate with global AMD teams, and perform yield and parameter analyses to inform design and manufacturing decisions.

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FursaFursa
AMD
AMD
4 months ago

Product Development Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 12 hours agoStatus: Live
Reposted: similar role first listed 11 months ago

Job Summary

The Member Technical Staff, Process Technology Integration, will partner with foundry teams to drive yield, performance, and reliability for AMD’s high-volume CPU/GPU/APU manufacturing. You’ll evaluate and implement process improvements across FEOL loops, collaborate with global AMD teams, and perform yield and parameter analyses to inform design and manufacturing decisions.
Location: Taiwan
Workplace: Hybrid
Employment Type: Full time
Job Function: Communications, PR & Community

Key Responsibilities

  • •Provide expertise in process and integration for advanced FEOL Front-End-Of-Line loops such as isolation/fin/channel, epi/source-drain, spacer, gate stack and patterning.
  • •Detailed review of systematic defect and parametric signatures with the foundry, and oversight of FEOL issues across products and technology nodes.
  • •Jointly design and analyze process improvement (CIP/BKM) evaluations run at the foundry for FEOL integration loop modules; provide technical assessment for CIP/BKM roll-out decisions.
  • •Hands-on basic product yield analysis (hardbin, softbin & parametric data) as well as foundry WAT/electrical test parameter analysis.
  • •Regular cross-product comparison and analysis of yield loss signatures, including the effect of differing DFM/layout usage on fail rates across stdcell types/logic blocks/memory arrays.

Key Requirements

  • •Master's or Ph.D. degree preferred in Electrical Engineering, Chemical Engineering, Materials Science and Engineering or Physics/Chemistry
  • •Hands-on yield analysis (hardbin, softbin & parametric data) and electrical test parameter analysis
  • •Experience with FEOL-related processes such as diffusion/ALD/epi/implant/cleans/litho/RIE and multi-patterning/SADP, isolation/fin
  • •Knowledge of PFA and FI techniques used in Device Analysis and ability to deduce fail mechanisms
  • •Strong communication skills and ability to interact with external foundry and internal teams across time zones
Experience:SemiconductorFEOLWafer fab
Education:Bachelor's in Electrical Engineering
Skills:CommunicationCollaborationProblem-solving
Languages:English

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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