Product Engineering Manager

AMD
Austin
Workplace: HybridFull timeUSD 128,800 - 220,800 annuallyFunction: Communications, PR & CommunityEducation: mastersSkills: ["Leadership","Communication","Problem-solving","Adaptability","Stakeholder management"]

Lead a team of 4–7 product engineers for AMD server product engineering, driving delivery of optimized test points and product definitions across PVT corners. Own post-silicon debug and issue closure for process/yield/device, and develop characterization and test coverage strategies. Establish pre-silicon pattern requirements, execute characterization and test plans, and drive yield, quality, and product performance optimization across Product Engineering, Fab, Platform Validation, and SW Engineering.

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FursaFursa
AMD
AMD
3 days ago

Product Engineering Manager

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live

Job Summary

Lead a team of 4–7 product engineers for AMD server product engineering, driving delivery of optimized test points and product definitions across PVT corners. Own post-silicon debug and issue closure for process/yield/device, and develop characterization and test coverage strategies. Establish pre-silicon pattern requirements, execute characterization and test plans, and drive yield, quality, and product performance optimization across Product Engineering, Fab, Platform Validation, and SW Engineering.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Manager level

Key Responsibilities

  • •Lead 4–7 product engineers for product engineering activities on an AMD Server product.
  • •Drive delivery of optimized test points and product definitions across PVT corners to meet business requirements.
  • •Execute pre-silicon pattern requirements, driving Design Verification deliveries, and execute defined characterization and test plans on new silicon.
  • •Drive post-silicon debug and closure of issues affecting process, yield, and device; improve yield and quality across wafer sort, final test, and SLT.
  • •Optimize product performance and ensure defined product meets customer quality and company yield, test time, and schedule requirements.

Pay and Benefits

Salary: USD 128,800 - 220,800 annually

Key Requirements

  • •B.S./M.S. in Computer Engineering or Electrical Engineering or related field/experience.
  • •Demonstrated competency in statistical methods and tools for data analysis.
  • •Understanding of semiconductor process, packaging, and test technologies.
  • •Experience with semiconductor fabrication process optimization, including defining and validating semiconductor device performance preferred.
  • •Familiarity with DFT features such as ATPG Scan, memory BIST, JTAG, and at-speed testing, plus product characterization and test point optimization.
Experience:SemiconductorsDFTSemiconductor fabricationTest and characterization
Education:Master's in Computer Engineering or Electrical Engineering
Skills:LeadershipCommunicationProblem-solvingAdaptabilityStakeholder management
Languages:En-us
Tech Stack:DFTATPG ScanMemory BISTJTAGAt-speed testing

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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