Texas Instruments

2 months ago

DFT Lead

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 12 hours agoStatus: Live

Job Summary

Lead DFT strategy and execution for complex SoC and MCU designs supporting AI data center and humanoid system applications. Direct and mentor a team of DFT engineers to develop and evaluate test structures such as scan chains, BIST, JTAG, boundary scan, and ATPG flows. Track and present DFT project outcomes, test coverage, and manufacturing test results, drive continuous improvement in fault detection and test time, and collaborate with design, verification, physical design, and manufacturing teams.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Administration & Executive Assistance

Seniority: Manager level

Key Responsibilities

•Lead DFT strategy and execution across complex SoC and MCU designs for AI data center and humanoid system applications.
•Direct and guide a team of DFT engineers in designing, developing, and evaluating test structures including scan chains, BIST, JTAG, boundary scan, and ATPG flows.
•Prepare and present DFT project outcomes, test coverage metrics, and manufacturing test results; recommend actions to achieve desired results.
•Collaborate cross-functionally with design, verification, physical design, and manufacturing teams to integrate DFT methodologies early in the design cycle.
•Drive continuous improvement in test coverage, fault detection, and test time reduction across product families.

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s or PhD preferred).
•5+ years of experience in digital design or DFT engineering.
•Deep expertise in DFT methodologies including scan insertion, ATPG, BIST (Logic/Memory), JTAG, boundary scan, and test compression.
•Hands-on experience with industry-standard EDA tools such as Synopsys TestMAX and Mentor Tessent.
•Strong understanding of SoC/MCU architecture and digital design flows, with proven ability to lead teams and deliver results.

Experience:5+ years

Education:Bachelor's in Electrical Engineering, Computer Engineering (or related field)

Skills:CommunicationLeadershipCross-functional collaborationContinuous improvementMentoring

Tech Stack:DFTSoCMCUScan insertionATPGBISTJTAGBoundary scanTest compressionSynopsys TestMAXMentor Tessent

Company Brief

Texas Instruments

Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Dallas, United States

Founded: 1930

Website LinkedIn

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Texas Instruments

2 months ago

DFT Lead

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 12 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Administration & Executive Assistance

Seniority: Manager level

Key Responsibilities

•Lead DFT strategy and execution across complex SoC and MCU designs for AI data center and humanoid system applications.
•Direct and guide a team of DFT engineers in designing, developing, and evaluating test structures including scan chains, BIST, JTAG, boundary scan, and ATPG flows.
•Prepare and present DFT project outcomes, test coverage metrics, and manufacturing test results; recommend actions to achieve desired results.
•Collaborate cross-functionally with design, verification, physical design, and manufacturing teams to integrate DFT methodologies early in the design cycle.
•Drive continuous improvement in test coverage, fault detection, and test time reduction across product families.

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s or PhD preferred).
•5+ years of experience in digital design or DFT engineering.
•Deep expertise in DFT methodologies including scan insertion, ATPG, BIST (Logic/Memory), JTAG, boundary scan, and test compression.
•Hands-on experience with industry-standard EDA tools such as Synopsys TestMAX and Mentor Tessent.
•Strong understanding of SoC/MCU architecture and digital design flows, with proven ability to lead teams and deliver results.

Experience:5+ years

Education:Bachelor's in Electrical Engineering, Computer Engineering (or related field)

Skills:CommunicationLeadershipCross-functional collaborationContinuous improvementMentoring

Tech Stack:DFTSoCMCUScan insertionATPGBISTJTAGBoundary scanTest compressionSynopsys TestMAXMentor Tessent

Company Brief

Texas Instruments

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Dallas, United States

Founded: 1930

Website LinkedIn