Engineer, IPDev Layout

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 5-8 yearsSkills: ["Leadership","Planning","Problem-solving","Communication","Project management"]

Develop and deliver critical analog and mixed-signal custom layouts and full-chip integration support for memory IP used in DRAM chips. Verify layouts using LVS/DRC/Antenna, perform quality checks, and prepare documentation. Plan and execute block-level layout timelines across multiple projects while collaborating with global engineering teams. Build layouts for key analog blocks and support tape-outs as needed.

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FursaFursa
Micron Technology
Micron Technology
1 month ago

Engineer, IPDev Layout

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Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live

Job Summary

Develop and deliver critical analog and mixed-signal custom layouts and full-chip integration support for memory IP used in DRAM chips. Verify layouts using LVS/DRC/Antenna, perform quality checks, and prepare documentation. Plan and execute block-level layout timelines across multiple projects while collaborating with global engineering teams. Build layouts for key analog blocks and support tape-outs as needed.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Design and develop critical analog, mixed-signal, custom digital block layouts and support full chip-level integration.
  • •Perform layout verification (LVS/DRC/Antenna), conduct quality checks, and support documentation.
  • •Ensure timely delivery of block-level layouts with acceptable quality across multiple projects.
  • •Lead planning, area/time estimation, scheduling, and execution to meet project milestones.
  • •Communicate effectively with global engineering teams to drive successful layout project execution.

Key Requirements

  • •5 to 8 years of experience in analog/custom layout build in advanced CMOS process nodes (Planar, FinFET).
  • •Expertise with Cadence VLE/VXL and Mentor Graphics Calibre for DRC/LVS.
  • •Hands-on layout creation for critical blocks such as PLL, ADC, DAC, LDO, Bandgap, and comparators.
  • •Strong analog layout fundamentals (e.g., matching, electromigration, latch-up, parasitics) and understanding of layout effects on speed/capacitance/power/area.
  • •Ability to understand build constraints and hierarchy/architectures for memory designs; excellent problem-solving and communication skills.
Experience:5-8 yearsSemiconductorsDRAMAnalog designMixed-signal designCustom layoutAI/HPC applications
Education:
Skills:LeadershipPlanningProblem-solvingCommunicationProject management
Tech Stack:Cadence VLECadence VXLMentor Graphics CalibreLVSDRCAntennaCMOSPlanarFinFETDRAMHigh Bandwidth MemoryAnalog layoutMixed-signal layout

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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