NVIDIA

2 months ago

Physical Design Methodology Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Develop and optimize physical design methodologies for GPUs, CPUs, and SoCs, focusing on Power, Performance, and Area (PPA) and runtime efficiency on advanced nodes. Create workflows for place-and-route, floorplanning, and chip assembly; collaborate with partners to deliver top-tier PPA solutions; and enhance RTL-to-GDS flows to address design issues and improve yields.

Location: Taiwan

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Create and enhance cutting-edge physical design methodologies for GPUs/CPUs/SoCs, focusing on Power, Performance, and Area (PPA) and improving runtime efficiency of the physical design process on advanced technology nodes.
•Develop workflows for advanced place and route techniques, floorplanning, and chip assembly, including power and clock distribution, power/area optimization, timing analysis, IR and EM analysis.
•Collaborate with internal and external partners to enhance tools and methodologies, delivering top-tier PPA solutions across product lines.
•Continuously improve the RTL-to-GDS flow to address a wide range of design issues and implement proactive interventions.
•Support power integrity, design rules, and manufacturability considerations (DRC, UPF, EM/IR) throughout the design cycle.

Key Requirements

•MS in Electrical or Computer Engineering (or equivalent experience)
•5+ years of experience in Physical Design Engineering
•Demonstrated success in enhancing Power, Performance, and Area (PPA) for high-performance and low-power designs on advanced technology nodes
•Strong understanding of physical design optimization and routing methodologies (place, CTS, route, post-route) with power/area-efficient setup and hold optimization
•Experience with design rules in advanced technology nodes and impact on DRC closure, UPF power intent, and FSDB/SAIF usage

Experience:5+ yearsPhysical designEDAPPAPlace-and-routeDRCUPFFSDBSAIFRTL-to-GDS

Education:Master's in Electrical or Computer Engineering

Skills:PPA optimizationEDA toolsScriptingPythonC++TCLPerl

Tech Stack:TCLPerlPythonC++EDA tools

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

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NVIDIA

2 months ago

Physical Design Methodology Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Location: Taiwan

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Create and enhance cutting-edge physical design methodologies for GPUs/CPUs/SoCs, focusing on Power, Performance, and Area (PPA) and improving runtime efficiency of the physical design process on advanced technology nodes.
•Develop workflows for advanced place and route techniques, floorplanning, and chip assembly, including power and clock distribution, power/area optimization, timing analysis, IR and EM analysis.
•Collaborate with internal and external partners to enhance tools and methodologies, delivering top-tier PPA solutions across product lines.
•Continuously improve the RTL-to-GDS flow to address a wide range of design issues and implement proactive interventions.
•Support power integrity, design rules, and manufacturability considerations (DRC, UPF, EM/IR) throughout the design cycle.

Key Requirements

•MS in Electrical or Computer Engineering (or equivalent experience)
•5+ years of experience in Physical Design Engineering
•Demonstrated success in enhancing Power, Performance, and Area (PPA) for high-performance and low-power designs on advanced technology nodes
•Strong understanding of physical design optimization and routing methodologies (place, CTS, route, post-route) with power/area-efficient setup and hold optimization
•Experience with design rules in advanced technology nodes and impact on DRC closure, UPF power intent, and FSDB/SAIF usage

Experience:5+ yearsPhysical designEDAPPAPlace-and-routeDRCUPFFSDBSAIFRTL-to-GDS

Education:Master's in Electrical or Computer Engineering

Skills:PPA optimizationEDA toolsScriptingPythonC++TCLPerl

Tech Stack:TCLPerlPythonC++EDA tools

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor