Samsung

5 months ago

DFx Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 3 hours agoStatus: Live

Job Summary

Seasoned DFx engineer responsible for defining DFT scan architecture, implementing RTL-based DFT solutions for IP-level projects (GPU, system interconnect), and driving high test-coverage across bleeding-edge processes. You will collaborate with DFX/RTL/SOC/STA/PD teams, translate requirements into implementation specs, and optimize test-time and yield through silicon-level debugging and collaborative problem solving in Austin, TX.

Location: Austin

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Define a DFT architecture balancing coverage, test-time, and execution across SOC-level projects and test/debug modes.
•Create a detailed implementation spec documenting architecture details, SOC-level interface, clock design, and test modes.
•Finalize the specification with stakeholders including DFX/RTL/SOC/STA/PD teams.
•Implement DFT scan: RTL creation, LINT, timing-constraints, ATPG and simulation; benchmark test-coverage and test-time.
•Drive continuous DFX excellence by improving coverage, reducing test-time, and exploring tools/methods to improve execution efficiency

Pay and Benefits

Salary: USD 180,200 - 270,400 annually

Perks:MedicalDentalVisionLife Insurance401kTuition AssistanceWellness Stipend

Key Requirements

•10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD
•10+ years of DFx expertise encompassing multiple tapeouts for digital IP (CPU / GPU) and/or SOC projects
•Demonstrated ability to architect DFT solutions from scratch on at least 1 project, and to create detailed specifications that can be used as a blueprint for implementation
•Detailed understanding of test-coverage requirements across various scan modes especially as they pertain to bleeding-edge process nodes
•Strong familiarity with RTL coding & STA with working knowledge of Physical Design

Experience:10+ yearsSemiconductorsIPGPUASIC

Education:Bachelor's

Skills:CommunicationProblem-solving

Tech Stack:DFTRTLATPGSTAPhysical DesignVerilogScan

Company Brief

Samsung

Global conglomerate known for consumer electronics, home appliances, semiconductors, displays, and mobile devices. Designs and manufactures a wide range of products and solutions for consumers, enterprises, and industrial customers worldwide.

Industry: Conglomerates & Holding Companies

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Seoul, South Korea

Founded: 1938

Glassdoor: 3.7

Website LinkedIn

Loading job details...

Preparing the role view and application actions.

Samsung

5 months ago

DFx Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 3 hours agoStatus: Live

Job Summary

Location: Austin

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Define a DFT architecture balancing coverage, test-time, and execution across SOC-level projects and test/debug modes.
•Create a detailed implementation spec documenting architecture details, SOC-level interface, clock design, and test modes.
•Finalize the specification with stakeholders including DFX/RTL/SOC/STA/PD teams.
•Implement DFT scan: RTL creation, LINT, timing-constraints, ATPG and simulation; benchmark test-coverage and test-time.
•Drive continuous DFX excellence by improving coverage, reducing test-time, and exploring tools/methods to improve execution efficiency

Pay and Benefits

Salary: USD 180,200 - 270,400 annually

Perks:MedicalDentalVisionLife Insurance401kTuition AssistanceWellness Stipend

Key Requirements

•10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD
•10+ years of DFx expertise encompassing multiple tapeouts for digital IP (CPU / GPU) and/or SOC projects
•Demonstrated ability to architect DFT solutions from scratch on at least 1 project, and to create detailed specifications that can be used as a blueprint for implementation
•Detailed understanding of test-coverage requirements across various scan modes especially as they pertain to bleeding-edge process nodes
•Strong familiarity with RTL coding & STA with working knowledge of Physical Design

Experience:10+ yearsSemiconductorsIPGPUASIC

Education:Bachelor's

Skills:CommunicationProblem-solving

Tech Stack:DFTRTLATPGSTAPhysical DesignVerilogScan

Company Brief

Samsung

Industry: Conglomerates & Holding Companies

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Seoul, South Korea

Founded: 1938

Glassdoor: 3.7

Website LinkedIn