DFT Engineer

AMD
Shanghai
Full timeFunction: QA, Test & Release EngineeringExperience: 1+ yearsEducation: bachelorsSkills: ["Communication","Teamwork","Analytical skills","Problem-solving","Willingness to learn"]

Own RTG SOC DFT scan-domain execution end-to-end: tile/top-level scan insertion, ATPG, pattern generation, simulation, and coverage analysis, plus ATE test support. Partner with cross-site teams to improve scan quality and raise coverage across milestones. Contribute to automation environment development to increase efficiency, and support DFD (design for debug) and function teams. Use proven DFT workflows from insertion through production scan patterns.

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FursaFursa
AMD
AMD
16 hours ago

DFT Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 10 hours agoStatus: Live

Job Summary

Own RTG SOC DFT scan-domain execution end-to-end: tile/top-level scan insertion, ATPG, pattern generation, simulation, and coverage analysis, plus ATE test support. Partner with cross-site teams to improve scan quality and raise coverage across milestones. Contribute to automation environment development to increase efficiency, and support DFD (design for debug) and function teams. Use proven DFT workflows from insertion through production scan patterns.
Location: Shanghai
Employment Type: Full time
Job Function: QA, Test & Release Engineering

Key Responsibilities

  • •Execute RTG SOC DFT scan-domain work including tile/top-level scan insertion, ATPG, pattern generation, simulation, and coverage analysis.
  • •Collaborate cross-team to complete tile scan insertion and ATPG in each milestone.
  • •Deliver tile-level pattern generation and simulation/debug and perform tile-level coverage analysis to improve test coverage.
  • •Set up chip-level ATPG environment and complete chip-level DRC and simulation.
  • •Generate production scan patterns, ensure pattern quality, and support DFD (design for debug) and function teams; develop automation scripts to improve efficiency.

Key Requirements

  • •Bachelor or MS or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • •Experience in DFT: BS 6+ years, MS 3+ years, or PhD 1+ years.
  • •Strong knowledge of the DFT domain.
  • •Solid experience with DFT scan insertion and ATPG.
  • •Familiarity with ASIC/DFT regular tools (DC, Tessent, VCS) and experience with ATE bring-up.
Experience:1+ yearsDFTASICProcessor architectureVerificationATE
Education:Bachelor's in Electrical Engineering, Computer Engineering, or Computer Science
Skills:CommunicationTeamworkAnalytical skillsProblem-solvingWillingness to learn
Languages:English
Tech Stack:DFTATPGScan insertionPattern generationSimulationASICTessentVCSDC toolDRCATE

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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