MTS Silicon Design Engineer

AMD
Santa Clara
Workplace: OnsiteFull timeUSD 145,600 - 249,600 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: mastersSkills: []

Research, define, design, verify, and document ASIC development, including architecture, logic design, and system simulation. Lead multidimensional integrated-circuit layout efforts and evaluate process flow from high-level design through synthesis, place and route, and timing/power optimization. Create assertions and coverage points, perform design-for-test RTL work, and collaborate cross-functionally on significant technical problems across CPU/GPU/NOC/cache concepts.

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FursaFursa
AMD
AMD
3 days ago

MTS Silicon Design Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live
Reposted: similar role first listed 3 months ago

Job Summary

Research, define, design, verify, and document ASIC development, including architecture, logic design, and system simulation. Lead multidimensional integrated-circuit layout efforts and evaluate process flow from high-level design through synthesis, place and route, and timing/power optimization. Create assertions and coverage points, perform design-for-test RTL work, and collaborate cross-functionally on significant technical problems across CPU/GPU/NOC/cache concepts.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing using electronic theory.
  • •Lead ASIC development, including definition, design, verification, and documentation; determine architecture and logic design and perform system simulation.
  • •Define module interfaces/formats for simulation and lead multidimensional integrated-circuit designs involving complex layout work.
  • •Evaluate process flow from high-level designs to synthesis, place and route, and timing and power optimization to meet requirements.
  • •Create assertions and coverage points, and work on design-for-test (DFT) and cross-functional engineering efforts on significant technical issues.

Pay and Benefits

Salary: USD 145,600 - 249,600 annually

Key Requirements

  • •Master’s degree (or foreign equivalent) in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field.
  • •3 years of experience in RTL design and coding for ASIC/silicon-related engineering roles.
  • •Experience with UVM and verification concepts, including defining coverage improvements via assertions and cover points.
  • •Experience designing logic blocks in CPU, GPU, NoC, or cache designs, covering digital electronics and high-speed designs.
  • •Experience with design for test (DFT), scan concepts, and DFT-friendly RTL, including x86 or ARM ISA knowledge.
Experience:3+ years
Education:Master's in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field
Languages:En-us
Tech Stack:ASICRTLRTL designCodingUVMLogic blocksCPUGPUNoCCacheDigital electronicsHigh-speed designsMulti-processor coherencyMemory orderingI/O orderingInterruptsMMUCachesDesign for testDFT

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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