Principal Engineer, IO Design

Micron Technology
Boise, Idaho
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: bachelorsSkills: ["Communication","Mentoring","Coaching"]

Design and optimize high-speed IO and clocking circuits for DRAM memory products. Lead development, verification, and fan-out of equalization and bandwidth-extension techniques that push circuit and process speed limits. Analyze IO impairments, clock jitter, and duty error impacts to DRAM system timing budgets, and build modeling/simulation methods that map circuit metrics to full-chip and system requirements. Partner with product engineering, SI, and process integration teams for correlation and next-node work.

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Micron Technology
Micron Technology
5 days ago

Principal Engineer, IO Design

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Last checked: 10 hours agoStatus: Live

Job Summary

Design and optimize high-speed IO and clocking circuits for DRAM memory products. Lead development, verification, and fan-out of equalization and bandwidth-extension techniques that push circuit and process speed limits. Analyze IO impairments, clock jitter, and duty error impacts to DRAM system timing budgets, and build modeling/simulation methods that map circuit metrics to full-chip and system requirements. Partner with product engineering, SI, and process integration teams for correlation and next-node work.
Location: Boise, Idaho
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Innovate, design, optimize, and verify high-speed IO and clocking circuits used in new DRAM products.
  • •Apply high-speed circuit design techniques and enhance performance evaluation of IO and clocking paths at the circuit level.
  • •Develop modeling, analysis, and simulation methodologies to capture circuit performance metrics and their impact at full-chip/system level.
  • •Collaborate with Product Engineering and SI teams to compare silicon performance with simulation results and support correlation activities.
  • •Partner with process integration and transistor modeling teams on next groundbreaking process node development.

Pay and Benefits

Equity and Bonus:Equity
Perks:Paid LeaveLearning BudgetWellness StipendEquityHealth Insurance

Key Requirements

  • •MSEE with 10+ years or BSEE with 12+ years of industry experience in analog and mixed-signal circuit design.
  • •Proficiency with UNIX and Cadence design environment for simulation, schematic entry, and SPF extraction.
  • •Understanding of device physics and basic CMOS processing techniques.
  • •Ability to supervise layout work and apply good layout practices to minimize parasitic impacts for high-speed circuits.
  • •Strong communication skills to convey complex technical concepts to other design peers.
Experience:10+ yearsSemiconductorDRAMAnalogMixed-signalHigh-speed circuits
Education:Bachelor's in Electrical Engineering
Skills:CommunicationMentoringCoaching
Tech Stack:UNIXCadenceSPF extractionPERLPythonAI/MLCMOSSimulationSchematic entryClock jitterEqualizationSI knowledgeChannel modelingTransceiver noiseTiming budget analysisModelingAnalysis

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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